US5012137A
Expired / Lapsed
US
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ECL-CMOS converter
Assignee: Siemens AG
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Filing: 1989-07-17
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Granted: 1991-04-30
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Expires: 2009-07-17
Abstract
Abstract An ECL-CMOS converter composed of a voltage-to-current converter and of a current-to-voltage converter is interconnected according to the "mismatched amplifier" principle. At two inputs of the voltage-to-current converter, the ECL input voltages are converted into a current that can be taken at an output of the voltage-to-current converter. The current is subsequently amplified in a current-to-voltage converter to an output voltage that is available at an output of the current-to-voltage converter. The current-to-voltage converter is composed of a feedback inverter stage, as a result thereof the operating point at an input of the current-to-voltage converter is stabilized at about half of an operating voltage of the converter.
Inventors
- 👤 Ernst Muellner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 12:25
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00369; H03K19/00384; H03K19/01; H03K19/017; H03K19/01707; H03K19/0175; H03K19/017509; H03K19/017518; H03K19/017527; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/09448
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
291 words
ECL-CMOS converter for converting ECL levels into CMOS levels, comprising a voltage-to-current converter connected in series with a current-to-voltage converter, first and second inputs of the voltage-to-current converter being first and second inputs of the ECL-CMOS converter and an output of the current-to-voltage converter being an output of the ECL-CMOS converter; the current-to-voltage converter containing a feedback CMOS inverter stage; a first input of the feedback CMOS inverter stage forming an input of the current-to-voltage converter and being connected via a feedback element to an output of the CMOS inverter stage; the output of the CMOS inverter stage forming the output of the current-to-voltage converter; a second input of the CMOS inverter stage being connected to a third terminal point and a third input thereof being connected to a fourth terminal point; and the feedback CMOS inverter stage also containing an enhancement p-channel MOS field effect transistor and an enhancement n-channel MOS field effect transistor; a first terminal of the enhancement p-channel field effect transistor being connected to the second input of the CMOS inverter stage; a first terminal of the enhancement n-channel MOS field effect transistor being connected to the third input of the MOS inverter stage; the first input of the CMOS inverter stage being directly connected to a gate terminal of the p-channel enhancement MOS field effect transistor and to a gate terminal of the n-channel enhancement MOS field effect transistor; a second terminal of the p-channel enhancement MOS field effect transistor and a second terminal of the n-channel enhancement MOS field effect transistor each being connected to the output of the CMOS inverter stage; the third terminal point being connected to the second supply voltage and the fourth terminal point being connected to the first supply voltage.
Claim 2
Dependent Claim
291 words
ECL-CMOS converter for converting ECL levels into CMOS levels, comprising a voltage-to-current converter connected in series with a current-to-voltage converter, first and second inputs of the voltage-to-current converter being first and second inputs of the ECL-CMOS converter and an output of the current-to-voltage converter being an output of the ECL-CMOS converter; the current-to-voltage converter containing a feedback CMOS inverter stage; a first input of the feedback CMOS inverter stage forming an input of the current-to-voltage converter and being connected via a feedback element to an output of the CMOS inverter stage; the output of the CMOS inverter stage forming the output of the current-to-voltage converter; a second input of the CMOS inverter stage being connected to a third terminal point and a third input thereof being connected to a fourth terminal point; and the feedback CMOS inverter stage also containing an enhancement p-channel MOS field effect transistor and an enhancement n-channel MOS field effect transistor; a first terminal of the enhancement p-channel field effect transistor being connected to the second input of the CMOS inverter stage; a first terminal of the enhancement n-channel MOS field effect transistor being connected to the third input of the MOS inverter stage; the first input of the CMOS inverter stage being directly connected to a gate terminal of the p-channel enhancement MOS field effect transistor and to a gate terminal of the n-channel enhancement MOS field effect transistor; a second terminal of the p-channel enhancement MOS field effect transistor and a second terminal of the n-channel enhancement MOS field effect transistor each being connected to the output of the CMOS inverter stage; the third terminal point being connected to the second supply voltage and the fourth terminal point being connected to the first supply voltage.
Claim 3
Dependent Claim
121 words
The ECL-CMOS converter according to claim 1, wherein the voltage-to-current converter contains a current source, a differential stage and a current mirror circuit; the first input of the voltage-to-current converter being connected to a first input of the differential stage and the second input of the voltage-to-current converter being connected to a second input of the differential stage; a third input of the differential stage connected to a first terminal point via the current source; first and second outputs of the differential stage connected respectively to first and second inputs of the current-mirror circuit; the second output of the differential stage forming an output of the voltage-to-current converter; a third input of the current-mirror circuit connected to a second terminal point.
Claim 4
Dependent Claim
15 words
The ECL-CMOS converter according to claim 1, wherein the feedback element is a feedback resistor.
Claim 5
Dependent Claim
120 words
The ECL-CMOS converter according to claim 2, wherein the differential stage contains first and second bipolar npn transistors; a base terminal of the first bipolar npn transistor forming the first input of the differential stage and a base terminal of the second bipolar npn transistor forming the second input of the differential stage; emitter terminals of the first and second bipolar npn transistors each being connected to the first terminal point via the current source; a collector of the second bipolar npn transistor forming the first output of the differential stage and a collector of the first bipolar npn transistor forming the second output of the differential stage; and the first terminal point being connected to a first supply voltage.
Claim 6
Dependent Claim
118 words
The ECL-CMOS converter according to claim 2, wherein the current-mirror circuit contains first and second enhancement p-channel MOS field effect transistors; a first terminal of the first enhancement p-channel MOS field effect transistor forming the first input of the current-mirror circuit and a first terminal of the second enhancement p-channel MOS transistor forming the second input of the current-mirror circuit; the first terminal of the first enhancement p-channel MOS transistor being connected to gate terminals of the first and second enhancement p-channel MOS transistor; second terminals of the first and second enhancement p-channel MOS transistor each being connected to the third input of the current-mirror circuit; and the second terminal point being connected to a second supply voltage.
Claim 7
Dependent Claim
16 words
The ECL-CMOS converter according to claim 2, wherein the current source is an MOS current source.
Claim 8
Dependent Claim
404 words
ECL-MOS converter for converting ECL levels into CMOS levels, comprising a voltage-to-current converter connected in series with a current-to-voltage converter, first and second inputs of the voltage-to-current converter being first and second inputs of the ECL-CMOS converter and an output of the current-to-voltage converter being an output of the ECL-CMOS converter, the voltage-to-current converter containing a current source, a differential stage and a current mirror circuit; the first input of the voltage-to-current converter being connected to a first input of the differential stage and the second input of the voltage-to-current converter being connected to a second input of the differential stage; a third input of the differential stage connected to a first terminal point via the current source; first and second outputs of the differential stage connected respectively to first and second inputs of the current-mirror circuit; the second output of the differential stage forming an output of the voltage-to-current converter; a third input of the current-mirror circuit connected to a second terminal point, the current-to-voltage converter containing a feedback CMOS inverter stage; a first input of the feedback CMOS inverter stage forming an input of the current-to-voltage converter and being connected via a feedback element to an output of the CMOS inverter stage; the output of the CMOS inverter stage forming the output of the current-to-voltage converter; a second input of the CMOS inverter stage being connected to a third terminal point and a third input thereof being connected to a fourth terminal point; and the feedback CMOS inverter stage also containing an enhancement p-channel MOS field effect transistor and an enhancement n-channel MOS field effect transistor; a first terminal of the enhancement p-channel field effect transistor being connected to the second input of the CMOS inverter stage; a first terminal of the enhancement n-channel MOS field effect transistor being connected to the third input of the CMOS inverter stage; the first input of the CMOS inverter stage being directly connected to a gate terminal of the p-channel enhancement MOS field effect transistor and to a gate terminal of the n-channel enhancement MOS field effect transistor; a second terminal of the p-channel enhancement MOS field effect transistor and a second terminal of the n-channel enhancement MOS field effect transistor each being connected to the output of the CMOS inverter stage; the third terminal point being connected to the second supply voltage and the fourth terminal point being connected to the first supply voltage.
Claim 9
Dependent Claim
404 words
ECL-MOS converter for converting ECL levels into CMOS levels, comprising a voltage-to-current converter connected in series with a current-to-voltage converter, first and second inputs of the voltage-to-current converter being first and second inputs of the ECL-CMOS converter and an output of the current-to-voltage converter being an output of the ECL-CMOS converter, the voltage-to-current converter containing a current source, a differential stage and a current mirror circuit; the first input of the voltage-to-current converter being connected to a first input of the differential stage and the second input of the voltage-to-current converter being connected to a second input of the differential stage; a third input of the differential stage connected to a first terminal point via the current source; first and second outputs of the differential stage connected respectively to first and second inputs of the current-mirror circuit; the second output of the differential stage forming an output of the voltage-to-current converter; a third input of the current-mirror circuit connected to a second terminal point, the current-to-voltage converter containing a feedback CMOS inverter stage; a first input of the feedback CMOS inverter stage forming an input of the current-to-voltage converter and being connected via a feedback element to an output of the CMOS inverter stage; the output of the CMOS inverter stage forming the output of the current-to-voltage converter; a second input of the CMOS inverter stage being connected to a third terminal point and a third input thereof being connected to a fourth terminal point; and the feedback CMOS inverter stage also containing an enhancement p-channel MOS field effect transistor and an enhancement n-channel MOS field effect transistor; a first terminal of the enhancement p-channel field effect transistor being connected to the second input of the CMOS inverter stage; a first terminal of the enhancement n-channel MOS field effect transistor being connected to the third input of the CMOS inverter stage; the first input of the CMOS inverter stage being directly connected to a gate terminal of the p-channel enhancement MOS field effect transistor and to a gate terminal of the n-channel enhancement MOS field effect transistor; a second terminal of the p-channel enhancement MOS field effect transistor and a second terminal of the n-channel enhancement MOS field effect transistor each being connected to the output of the CMOS inverter stage; the third terminal point being connected to the second supply voltage and the fourth terminal point being connected to the first supply voltage.
Claim 10
Dependent Claim
15 words
The ECL-CMOS converter according to claim 7, wherein the feedback element is a feedback resistor.
Claim 11
Dependent Claim
120 words
The ECL-CMOS converter according to claim 7, wherein the differential stage contains first and second bipolar npn transistors; a base terminal of the first bipolar npn transistor forming the first input of the differential stage and a base terminal of the second bipolar npn transistor forming the second input of the differential stage; emitter terminals of the first and second bipolar npn transistors each being connected to the first terminal point via the current source; a collector of the second bipolar npn transistor forming the first output of the differential stage and a collector of the first bipolar npn transistor forming the second output of the differential stage; and the first terminal point being connected to a first supply voltage.
Claim 12
Dependent Claim
118 words
The ECL-CMOS converter according to claim 7, wherein the current-mirror circuit contains first and second enhancement p-channel MOS field effect transistors; a first terminal of the first enhancement p-channel MOS field effect transistor forming the first input of the current-mirror circuit and a first terminal of the second enhancement p-channel MOS transistor forming the second input of the current-mirror circuit; the first terminal of the first enhancement p-channel MOS transistor being connected to gate terminals of the first and second enhancement p-channel MOS transistor; second terminals of the first and second enhancement p-channel MOS transistor each being connected to the third input of the current-mirror circuit; and the second terminal point being connected to a second supply voltage.
Claim 13
Dependent Claim
16 words
The ECL-CMOS converter according to claim 7, wherein the current source is an MOS current source.
Claim 14
Dependent Claim
512 words
ECL-CMOS converter for converting ECL levels into CMOS levels, comprising a voltage-to-current converter connected in series with a current-to-voltage converter, first and second inputs of the voltage-to-current converter being first and second inputs of the ECL-CMOS converter and an output of the current-to-voltage converter being an output of the ECL-CMOS converter, the voltage-to-current converter containing a current source, a differential stage and a current mirror circuit; the first input of the voltage-to-current converter being connected to a first input of the differential stage and the second input of the voltage-to-current converter being connected to a second input of the differential stage; a third input of the differential stage connected to a first terminal point via the current source; first and second outputs of the differential stage connected respectively to first and second inputs of the current-mirror circuit; the second output of the differential stage forming an output of the voltage-to-current converter; a third input of the current-mirror circuit connected to a second terminal point, the current-to-voltage converter containing a feedback CMOS inverter stage; a first input of the feedback CMOS inverter stage forming an input of the current-to-voltage converter and being connected via a feedback element to an output of the CMOS inverter stage; the output of the CMOS inverter stage forming the output of the current-to-voltage converter; a second input of the CMOS inverter stage being connected to a third terminal point and a third input thereof being connected to a fourth terminal point the differential stage containing first and second bipolar npn transistors; a base terminal of the first bipolar npn transistor forming the first input of the differential stage and a base terminal of the second bipolar npn transistor forming the second input of the differential stage; emitter terminals of the first and second bipolar npn transistors each being connected to the first terminal point via the current source; a collector of the second bipolar npn transistor forming the first output of the differential stage and a collector of the first bipolar npn transistor forming the second output of the differential stage; the first terminal point being connected to a first supply voltage, the feedback CMOS inverter stage containing an enhancement p-channel MOS field effect transistor and an enhancement n-channel MOS field effect transistor; a first terminal of the enhancement p-channel field effect transistor being connected to the second input of the CMOS inverter stage; a first terminal of the enhancement n-channel MOS field effect transistor being connected to the third input of the CMOS inverter stage; the first input of the CMOS inverter stage being connected to a gate terminal of the p-channel enhancement MOS field effect transistor and to a gate terminal of the n-channel enhancement MOS field effect transistor; a second terminal of the p-channel enhancement MOS field effect transistor and a second terminal of the n-channel enhancement MOS field effect transistor each being connected to the output of the CMOS inverter stage; the third terminal point being connected to the second supply voltage and the fourth terminal point being connected to the first supply voltage.
Claim 15
Dependent Claim
512 words
ECL-CMOS converter for converting ECL levels into CMOS levels, comprising a voltage-to-current converter connected in series with a current-to-voltage converter, first and second inputs of the voltage-to-current converter being first and second inputs of the ECL-CMOS converter and an output of the current-to-voltage converter being an output of the ECL-CMOS converter, the voltage-to-current converter containing a current source, a differential stage and a current mirror circuit; the first input of the voltage-to-current converter being connected to a first input of the differential stage and the second input of the voltage-to-current converter being connected to a second input of the differential stage; a third input of the differential stage connected to a first terminal point via the current source; first and second outputs of the differential stage connected respectively to first and second inputs of the current-mirror circuit; the second output of the differential stage forming an output of the voltage-to-current converter; a third input of the current-mirror circuit connected to a second terminal point, the current-to-voltage converter containing a feedback CMOS inverter stage; a first input of the feedback CMOS inverter stage forming an input of the current-to-voltage converter and being connected via a feedback element to an output of the CMOS inverter stage; the output of the CMOS inverter stage forming the output of the current-to-voltage converter; a second input of the CMOS inverter stage being connected to a third terminal point and a third input thereof being connected to a fourth terminal point the differential stage containing first and second bipolar npn transistors; a base terminal of the first bipolar npn transistor forming the first input of the differential stage and a base terminal of the second bipolar npn transistor forming the second input of the differential stage; emitter terminals of the first and second bipolar npn transistors each being connected to the first terminal point via the current source; a collector of the second bipolar npn transistor forming the first output of the differential stage and a collector of the first bipolar npn transistor forming the second output of the differential stage; the first terminal point being connected to a first supply voltage, the feedback CMOS inverter stage containing an enhancement p-channel MOS field effect transistor and an enhancement n-channel MOS field effect transistor; a first terminal of the enhancement p-channel field effect transistor being connected to the second input of the CMOS inverter stage; a first terminal of the enhancement n-channel MOS field effect transistor being connected to the third input of the CMOS inverter stage; the first input of the CMOS inverter stage being connected to a gate terminal of the p-channel enhancement MOS field effect transistor and to a gate terminal of the n-channel enhancement MOS field effect transistor; a second terminal of the p-channel enhancement MOS field effect transistor and a second terminal of the n-channel enhancement MOS field effect transistor each being connected to the output of the CMOS inverter stage; the third terminal point being connected to the second supply voltage and the fourth terminal point being connected to the first supply voltage.
Claim 16
Dependent Claim
15 words
The ECL-CMOS converter according to claim 12, wherein the feedback element is a feedback resistor.
Claim 17
Dependent Claim
16 words
The ECL-CMOS converter according to claim 12, wherein the current source is an MOS current source.
Claim 18
Dependent Claim
118 words
The ECL-CMOS converter according to claim 12, wherein the current-mirror circuit contains first and second enhancement p-channel MOS field effect transistors; a first terminal of the first enhancement p-channel MOS field effect transistor forming the first input of the current-mirror circuit and a first terminal of the second enhancement p-channel MOS transistor forming the second input of the current-mirror circuit; the first terminal of the first enhancement p-channel MOS-transistor being connected to gate terminals of the first and second enhancement p-channel MOS transistor; second terminals of the first and second enhancement p-channel MOS transistor each being connected to the third input of the current mirror circuit; and the second terminal point being connected to the second supply voltage.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-04-29 | 1994-10-29 | 1995-04-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-04-29 | 1998-10-29 | 1999-04-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-04-29 | 2002-10-29 | 2003-04-30 | $7700.00 | Window Closed / Lapsed |