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US5010387A Expired / Lapsed US ⏱️ 0.0 years remaining

Solder bonding material

Assignee: Samsung Electronics Co Ltd
•
Filing: 1988-11-21
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Granted: 1991-04-23
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Expires: 2008-11-21
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Abstract

Abstract Disclosed is a composition and method for providing conductive electronic component high strength bonding. The composition comprises an effective amount of material which is less than 3% by weight of tin and greater than 97% by weight of lead. The method invention comprises providing a leadframe comprising at least one of power, ground, and signal conductive elements; and preforming solder material onto one of the conductive elements, the solder bonding material having an effective amount of material which is less than 3% by weight of tin and greater than 97% by weight of lead.

Inventors

  • 👤 Thomas J. Dunaway
  • 👤 Richard K. Spielberger
  • 👤 Lori A. Dicks
  • 👤 Jerald M. Loy

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 06:30
CPC Classifications
H; H10; H10W; H10W76/00; H10W76/60; B; B23; B23K; B23K35/00; B23K35/22; B23K35/24; B23K35/26; B23K35/268; H10W72/00; H10W72/071; H10W72/077; H10W72/20; H10W72/701; Y; Y10; Y10T; Y10T428/00; Y10T428/12; Y10T428/12493; Y10T428/12701

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 91 words
A leadframe assembly having conductive elements preformed with high strength solder bumps for use in interconnecting the leadframe with an electronic device comprising: a) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to bonding locations on an electronic device; and b) solder bumps preformed on the conductive elements for selective bonding with bonding locations on the electronic device, the solder bumps comprising a composition for maintaining a single solid phase over the temperature range of 0° C. to 150° C.
Claim 2
Dependent Claim 91 words
A leadframe assembly having conductive elements preformed with high strength solder bumps for use in interconnecting the leadframe with an electronic device comprising: a) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to bonding locations on an electronic device; and b) solder bumps preformed on the conductive elements for selective bonding with bonding locations on the electronic device, the solder bumps comprising a composition for maintaining a single solid phase over the temperature range of 0° C. to 150° C.
Claim 3
Dependent Claim 36 words
A leadframe assembly according to claim 1 wherein the solder bumps have a composition comprising: a) about 0.5% to about 2% by weight of tin; and b) about 98% to about 99.5% by weight of lead.
Claim 4
Dependent Claim 23 words
A leadframe assembly according to claim 1 wherein the leadframe means comprises a tape leadframe having dielectric material for separating the conductive elements.
Claim 5
Dependent Claim 94 words
A leadframe assembly having conductive elements preformed with high strength solder bumps for use in interconnecting the leadframe with an electronic device comprising: a) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to bonding locations on an electronic device; and b) solder bumps preformed on the conductive elements for selective bonding with bonding locations on the electronic device, the solder bumps comprising: i) about 0.5% to about 2% by weight of tin; and ii) about 98% to about 99.5% by weight of lead.
Claim 6
Dependent Claim 94 words
A leadframe assembly having conductive elements preformed with high strength solder bumps for use in interconnecting the leadframe with an electronic device comprising: a) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to bonding locations on an electronic device; and b) solder bumps preformed on the conductive elements for selective bonding with bonding locations on the electronic device, the solder bumps comprising: i) about 0.5% to about 2% by weight of tin; and ii) about 98% to about 99.5% by weight of lead.
Claim 7
Dependent Claim 23 words
A leadframe assembly according to claim 4 wherein the leadframe means comprises a tape leadframe having dielectric material for separating the conductive elements.
Claim 8
Dependent Claim 98 words
A low-cost high-strength leadframe and semiconductor chip assembly comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; and b) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to the bonding locations on the semiconductor chip; c) solder bump means comprising solder bumps reflowed between corresponding leadframe conductive elements and bonding locations on the semiconductor chip, the solder bumps having a composition for maintaining a single solid phase over the temperature range of 0° C to 150° C.
Claim 9
Dependent Claim 98 words
A low-cost high-strength leadframe and semiconductor chip assembly comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; and b) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to the bonding locations on the semiconductor chip; c) solder bump means comprising solder bumps reflowed between corresponding leadframe conductive elements and bonding locations on the semiconductor chip, the solder bumps having a composition for maintaining a single solid phase over the temperature range of 0° C to 150° C.
Claim 10
Dependent Claim 34 words
The assembly of claim 6 wherein the solder bumps have a composition comprising: a) about 0.5% to about 2% by weight of tin; and b) about 98% to about 99.5% by weight of lead.
Claim 11
Dependent Claim 104 words
A low-cost high-strength leadframe and semiconductor chip assembly comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; and b) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to the bonding locations on the semiconductor chip; c) solder bump means comprising solder bumps reflowed between corresponding leadframe conductive elements and bonding locations on the semiconductor chip, the solder bumps having a composition comprising: i) about 0.5% to about 2% by weight of tin; and ii) about 98% to about 99.5% by weight of lead.
Claim 12
Dependent Claim 104 words
A low-cost high-strength leadframe and semiconductor chip assembly comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; and b) leadframe means comprising at least one of power, ground, and signal conductive elements for transmitting input and output signals to the bonding locations on the semiconductor chip; c) solder bump means comprising solder bumps reflowed between corresponding leadframe conductive elements and bonding locations on the semiconductor chip, the solder bumps having a composition comprising: i) about 0.5% to about 2% by weight of tin; and ii) about 98% to about 99.5% by weight of lead.
Claim 13
Dependent Claim 98 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the leadframe conductive elements for selective bonding with bonding locations on the semiconductor chip, the solder bumps comprising a composition for maintaining a single solid phase over the temperature range of 0° C. to 150° C.
Claim 14
Dependent Claim 98 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the leadframe conductive elements for selective bonding with bonding locations on the semiconductor chip, the solder bumps comprising a composition for maintaining a single solid phase over the temperature range of 0° C. to 150° C.
Claim 15
Dependent Claim 35 words
The assembly kit of claim 9 wherein the solder bumps have a composition comprising: a) about 0.5% to about 2% by weight of tin; and b) about 98% to about 98.5% by weight of lead.
Claim 16
Dependent Claim 100 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the leadframe conductive elements for selective bonding with bonding locations on the semiconductor chip, the solder bumps comprising: i) about 0.5% to about 2% by weight of tin; ii) about 98% to about 98.5% by weight of lead.
Claim 17
Dependent Claim 100 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising: a) a semiconductor chip comprising bonding locations for input and output of signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the leadframe conductive elements for selective bonding with bonding locations on the semiconductor chip, the solder bumps comprising: i) about 0.5% to about 2% by weight of tin; ii) about 98% to about 98.5% by weight of lead.
Claim 18
Dependent Claim 94 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising; a) a semiconductor chip comprising bonding locations for input and output signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the chip bonding locations for selective bonding with leadframe conductive elements, the solder bumps comprising a composition for maintaining a single solid phase over the temperature range of 0° C. to 150° C.
Claim 19
Dependent Claim 94 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising; a) a semiconductor chip comprising bonding locations for input and output signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the chip bonding locations for selective bonding with leadframe conductive elements, the solder bumps comprising a composition for maintaining a single solid phase over the temperature range of 0° C. to 150° C.
Claim 20
Dependent Claim 35 words
The assembly kit of claim 12 wherein the solder bumps have a composition comprising: a) about 0.5% to about 2% by weight of tin; and b) about 98% to about 98.5% by weight of lead.
Claim 21
Dependent Claim 96 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising; a) a semiconductor chip comprising bonding locations for input and output signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the chip bonding locations for selective bonding with leadframe conductive elements, the solder bumps comprising; i) about 0.5% to about 2% by weight of tin; ii) about 98% to about 98.5% by weight of lead.
Claim 22
Dependent Claim 96 words
A low-cost high-yield high-strength semiconductor chip and leadframe assembly kit comprising; a) a semiconductor chip comprising bonding locations for input and output signals to and from the chip; b) a leadframe having at least one of power, ground, and signal conductive elements for transferring signals to and from the chip bonding locations; and c) bonding means comprising solder bumps preformed to the chip bonding locations for selective bonding with leadframe conductive elements, the solder bumps comprising; i) about 0.5% to about 2% by weight of tin; ii) about 98% to about 98.5% by weight of lead.

References Cited (Backward Citations)

US274445A Cited
US4332343A Cited
EP0039160A2 Cited
US4480261A Cited
EP0103025A1 Cited
US4754912A Cited
US4673772A Cited
EP0193127A1 Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-04-22 1994-10-22 1995-04-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-04-22 1998-10-22 1999-04-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-04-22 2002-10-22 2003-04-23 $7700.00 Window Closed / Lapsed

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