Programmable channel error injection

Claim 2

In a computer system having a channel, microcode means for controlling the channel by executing a sequence of microcode instructions, and a console interface, an error injection tool comprising: input means communicating between said channel and said console interface for inputting at least one parameter; error inject means in said channel for dynamically instructing said microcode means to inject a specified error into said channel at a selected microcode instruction responsive to one or more parameters from said console interface; and timing means for measuring the time of said computer system to recover from the error injected responsive to said microcode means.

Claim 3

The error injection tool of claim 1, wherein said timing means comprises a time of day log having an entry for storing the time of day when said error is injected into said channel, and an entry for storing the time of day when said channel complete recovery from said error injected into said channel.

Claim 4

The error injection tool of claim 1 wherein said error inject means includes an address compare register connected to said input means for receiving an address of a selected instruction in said sequence of microcode instructions when said specified error is to be injected, and an error type register connected to said input means for receiving an indication of the type of error to be injected.

Claim 5

The error injection tool of claim 3 wherein said error inject means further comprises a selection maintenance register connected to said input means for receiving a code for controlling the injection of said error into said channel.

Claim 6

The error injection tool of claim 4 further comprising error arming means connected between said error type register and said selection maintenance register, said error arming means which, when enabled, arms the injection of said error into said channel.

Claim 7

The error injection tool of claim 5 wherein said error arming means includes AND means connected to said address compare register and said selection maintenance register, said AND means for enabling said error arming means by the address in said address compare register and the code in said selection maintenance register.

Claim 8

The error injection tool of claim 6 further comprising storage means for storing a list of entries, each entry of said list containing said parameters for injecting an error into said channel.

Claim 9

The error injection tool of claim 7 further comprising decode means between said input means, said storage means, and said error inject means for selecting data from either of said console interface or a list entry in said storage means, said selected data for being input into at least one of said address compare register, said selection maintenance register and said error type register.

Claim 10

The error injection tool of claim 8 wherein said error inject means includes interrupt signal generating means connected between said selection maintenance register and said address compare register, said interrupt signal generating means for generating an interrupt signal responsive to the code in said selection maintenance register and the address in said address compare register.

Claim 11

The error injection tool of claim 9 further comprising microcode in said microcode means for loading, in response to an interrupt signal generated by said interrupt signal generating means, new data into at least one of said address compare register, said selection maintenance register and said error type register from an entry of parameters in said list in said storage means.

Claim 12

An error injection tool for use in a computer system having working storage for storing control bits, addressable instruction storage for storing microcode instructions, and a microcode controlled device whose function is controlled by the control bits in said working storage, said microcode controlled device having a microcode instruction executing means for executing microcode instructions stored in a set sequence of addresses in said microcode instruction storage, said error injection tool comprising: address compare means for comparing a selected address with the address of a microcode instruction currently being executed; interrupt signal generating means for generating an interrupt signal responsive to an equal compare by said address compare means; a microcode routine for altering said control bits stored in said working storage responsive to said generated interrupt signal for injecting a delayed error, which delayed error is not injected until the use of said altered control bit by the execution of a subsequent microcode instruction at a later time; execution control means for transferring the execution of said microcode executing means to said microcode routine responsive to said interrupt signal; and return means in said microcode routine for returning the execution of said microcode executing means to a microcode instruction at the address following said selected address in said set sequence of addresses such that the effect of the altered control bits on the microcode controlled device may be observed.

Claim 13

An error injection tool for use in a computer system having working storage for storing control bits, addressable instruction storage for storing microcode instructions, and a microcode controlled device whose function is controlled by the control bits in said working storage, said microcode controlled device having a microcode instruction executing means for executing microcode instructions stored in a set sequence of addresses in said microcode instruction storage, said error injection tool comprising: address compare means for comparing a selected address with the address of a microcode instruction currently being executed; interrupt signal generating means for generating an interrupt signal responsive to an equal compare by said address compare means; a microcode routine for altering said control bits stored in said working storage responsive to said generated interrupt signal for injecting a delayed error, which delayed error is not injected until the use of said altered control bit by the execution of a subsequent microcode instruction at a later time; execution control means for transferring the execution of said microcode executing means to said microcode routine responsive to said interrupt signal; and return means in said microcode routine for returning the execution of said microcode executing means to a microcode instruction at the address following said selected address in said set sequence of addresses such that the effect of the altered control bits on the microcode controlled device may be observed.

Claim 14

In a computer system having a channel, microcode means for controlling the channel, and a console interface, an error injection tool comprising: input means communicating between said channel and said console interface for inputting at least one parameter; storage means connected to said input means for storing parameters from said input means in a list having entries of parameters; and error inject means in said channel for dynamically instructing said microcode means to inject a specified error into said channel responsive to one or more parameters from either said console interface or an entry of parameters in said storage means.

Claim 15

In a computer system having a channel, microcode means for controlling the channel, and a console interface, an error injection tool comprising: input means communicating between said channel and said console interface for inputting at least one parameter; storage means connected to said input means for storing parameters from said input means in a list having entries of parameters; and error inject means in said channel for dynamically instructing said microcode means to inject a specified error into said channel responsive to one or more parameters from either said console interface or an entry of parameters in said storage means.

Claim 16

The error injection tool of claim 12 further comprising timing means for measuring the time of said computer system to recover from the error injected responsive to said microcode means.

Claim 17

The error injection tool of claim 13 wherein said timing means comprises a time of day log having an entry for storing the time of day when said error is injected into said channel, and an entry for storing the time of day when said channel completes recovery from said error injected into said channel.

Claim 18

The error injection tool of claim 12 wherein said microcode means includes instruction storage means for storing a program of microcode instructions and execution means for executing said microcode instructions in a preselected sequence, and wherein said error inject means includes an address compare register connected to said input means for receiving an address of a microcode instruction in said program stored in said instruction storing means at which, when executed, said specified error is to be injected, and an error type register connected to said input means for receiving an indication of the type of error to be injected.

Claim 19

The error injection tool of claim 15 wherein said error inject means further comprises a selection maintenance register connected to said input means for receiving a code for controlling the injection of said error into said channel.

Claim 20

The error injection tool of claim 16 further comprising error arming means connected between said error type register and said selection maintenance register, said error arming means which, when enabled, arms the injection of said error into said channel.

Claim 21

The error injection tool of claim 17 wherein said error arming means includes AND means connected to said address compare register and said selection maintenance register, said AND means for enabling said error arming means by the address in said address compare register and the code in said selection maintenance register.

Claim 22

The error injection tool of claim 18 further comprising decode means between said input means, said storage means, and said error inject means for selecting data from either of said console interface or a list entry in said storage means, said selected data for being input into at least one of said address compare register, said selection maintenance register and said error type register.

Claim 23

The error injection tool of claim 19 wherein said error inject means includes interrupt signal generating means connected between said selection maintenance register and said address compare register, said interrupt signal generating means for generating an interrupt signal responsive to the code in said selection maintenance register and the address in said address compare register.

Claim 24

The error injection tool of claim 20 further comprising microcode in said microcode means for loading, in response to an interrupt signal generated by said interrupt signal generating means, new data into at least one of said address compare register, said selection maintenance register and said error type register from an entry of parameters in said list in said storage means.

Claim 25

An error injection tool for use in a computer system having working storage for storing control bits, addressable instruction storage for storing a functional program having a selected sequence of microcode instructions, and a microcode controlled device having a microcode instruction executing means for executing instructions from said functional program thereby controlling said microcode controlled device as specified by said control bits, said error injection tool comprising: a set of parameters in said working storage for controlling the injection of errors into the computer system; error inject hardware means for injecting an immediate error into said computer system responsive to parameters in said set of parameters; an error inject microcode routine for execution by said microcode instruction executing means to thereby inject a delayed error into said computer system by altering one or more of said control bits; instruction address compare means for comparing the address of the instruction being executed by said microcode instruction executing means with a selected address for determining when to inject an error; and logic means responsive to at least one parameter in said set of parameters for selecting at least one of said error inject hardware means and said error inject microcode routine such that at least one of an immediate error and a delayed error is injected into said computer system.

Claim 26

An error injection tool for use in a computer system having working storage for storing control bits, addressable instruction storage for storing a functional program having a selected sequence of microcode instructions, and a microcode controlled device having a microcode instruction executing means for executing instructions from said functional program thereby controlling said microcode controlled device as specified by said control bits, said error injection tool comprising: a set of parameters in said working storage for controlling the injection of errors into the computer system; error inject hardware means for injecting an immediate error into said computer system responsive to parameters in said set of parameters; an error inject microcode routine for execution by said microcode instruction executing means to thereby inject a delayed error into said computer system by altering one or more of said control bits; instruction address compare means for comparing the address of the instruction being executed by said microcode instruction executing means with a selected address for determining when to inject an error; and logic means responsive to at least one parameter in said set of parameters for selecting at least one of said error inject hardware means and said error inject microcode routine such that at least one of an immediate error and a delayed error is injected into said computer system.