Patent US4994808A successfully refreshed from Google Patents.
US4994808A
Expired / Lapsed
US
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Pipelined analog to digital converter with summing and comparator functions occurring in parallel for each bit
Assignee: Individual
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Filing: 1989-12-14
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Granted: 1991-02-19
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Expires: 2009-12-14
Abstract
Abstract A method and an apparatus are disclosed for analog-to-digital conversion where a reference signal is subtracted from the analog input signal, if needed. The mathematical functions are processed simultaneously with each bit's reference compare decision. The comparator's output control a switch which allows the analog input signal to bypass the summing circuit for certain digital outputs of the comparator. This reduces voltage error and conversion time by keeping the summing circuits out of the signal path if the corresponding bit is not actively represented in the binary word. This allows the converter to avoid synchronization requirements that many other types of A/D converters have.
Inventors
- 👤 Karl F. Wichelman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 17:01
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/42; H03M1/124; H03M1/1245; H03M1/125; H03M1/14; H03M1/145; H03M1/36
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
204 words
A parallel summing analog-to-digital converter for the conversion of an analog input signal to a binary output, comprising: a first analog-to-digital converter bit comprising: an analog input signal; a means for generating a reference voltage; a summing circuit means for adding two potential producing a difference of the said two potentials as an output; said output being coupled to a resistance means; said summing circuit and said resistances means being in parallel with a switching means; said switching means being responsive to the output of a comparator means; said comparator means for comparing said reference voltage to the said analog input signal; said summing circuit subtracts said reference voltage from said analog input signal; said analog input signal coupled through said switching means and said summing circuit means; said output of said comparator means being a binary bit output; means of coupling said output of said comparator means to external circuitry; said output of said summing circuit means in parallel with said switching means generating a remainder analog output signal; a plurality of said first analog-to-digital converter bits being connected in series with said analog input signal coupled to said remainder analog output of previous bit to make a plurality of binary output bits.
Claim 2
Dependent Claim
204 words
A parallel summing analog-to-digital converter for the conversion of an analog input signal to a binary output, comprising: a first analog-to-digital converter bit comprising: an analog input signal; a means for generating a reference voltage; a summing circuit means for adding two potential producing a difference of the said two potentials as an output; said output being coupled to a resistance means; said summing circuit and said resistances means being in parallel with a switching means; said switching means being responsive to the output of a comparator means; said comparator means for comparing said reference voltage to the said analog input signal; said summing circuit subtracts said reference voltage from said analog input signal; said analog input signal coupled through said switching means and said summing circuit means; said output of said comparator means being a binary bit output; means of coupling said output of said comparator means to external circuitry; said output of said summing circuit means in parallel with said switching means generating a remainder analog output signal; a plurality of said first analog-to-digital converter bits being connected in series with said analog input signal coupled to said remainder analog output of previous bit to make a plurality of binary output bits.
Claim 3
Dependent Claim
37 words
The analog-to-digital converter of claim 1 wherein said summing means includes a charged capacitor with a polarity opposite of said analog input signal in series with a precision diode means and in parallel with said switching means.
Claim 4
Dependent Claim
35 words
The analog-to-digital converter of claim 1 wherein said summing means includes a charged capacitor with a polarity opposite of said analog input signal in series with a resistor and in parallel with said switching means.
Claim 5
Dependent Claim
27 words
The analog-to-digital converter of claim 2, wherein a charging means for said capacitor being said reference voltages coupled through a switching means responsive to an external input.
Claim 6
Dependent Claim
27 words
The analog-to-digital converter of claim 3, wherein a charging means for said capacitor being said reference voltages coupled through a switching means responsive to an external input.
Claim 7
Dependent Claim
36 words
The analog-to-digital converter of claim 2, wherein a charging means for said capacitor being said reference voltages coupled through a precision diode means, said reference voltage having a switching means being responsive to an external input.
Claim 8
Dependent Claim
36 words
The analog-to-digital converter of claim 3, wherein a charging means for said capacitor being said reference voltages coupled through a precision diode means, said reference voltage having a switching means being responsive to an external input.
Claim 9
Dependent Claim
26 words
The analog-to-digital converter of claim 2, wherein said precision diode means being a circuit functioning as an anode and cathode with near zero forward biasing potential.
Claim 10
Dependent Claim
26 words
The analog-to-digital converter of claim 6, wherein said precision diode means being a circuit functioning as an anode and cathode with near zero forward biasing potential.
Claim 11
Dependent Claim
284 words
A parallel reference voltage summing analog-to-digital converter for the conversion of an analog input signal to a binary output, comprising: a first analog-to-digital converter bit comprising: an analog input signal; a means for generating a set reference voltage; a previous bit's generated reference voltage coupled to a summing circuit; said summing circuit means for adding two potentials producing a difference of the said two potentials as an output; said summing circuit subtracts a said set reference voltage; said summing circuit output being the reference voltage for a comparator means; said comparator means for comparing said reference voltage to the said analog input signal; a precision diode means being a circuit with an anode and a cathode function with near zero forward biasing voltage drop; said output of said summing circuit being coupled to said anode of said precision diode means; said previous bit's generated reference voltage being coupled through a switching means; said switching means being responsive to the output of said comparator means; said output of said comparator being a binary bit output; means of coupling said binary bit output to an external circuitry; said previous bit's generated reference voltage coupled through said switching means being coupled to said cathode of said precision diode means; said coupling of said previous bit's generated reference voltage through said switching means and to said cathode of said precision diode generating a resultant reference voltage for the next less significant bit; a plurality of said first analog-to-digital converter bits being connected in series with said resultant reference voltage for the next less significant bit being coupled to said previous bit's generated reference voltage of the next less significant bit to make a plurality of binary output bits.
Claim 12
Dependent Claim
284 words
A parallel reference voltage summing analog-to-digital converter for the conversion of an analog input signal to a binary output, comprising: a first analog-to-digital converter bit comprising: an analog input signal; a means for generating a set reference voltage; a previous bit's generated reference voltage coupled to a summing circuit; said summing circuit means for adding two potentials producing a difference of the said two potentials as an output; said summing circuit subtracts a said set reference voltage; said summing circuit output being the reference voltage for a comparator means; said comparator means for comparing said reference voltage to the said analog input signal; a precision diode means being a circuit with an anode and a cathode function with near zero forward biasing voltage drop; said output of said summing circuit being coupled to said anode of said precision diode means; said previous bit's generated reference voltage being coupled through a switching means; said switching means being responsive to the output of said comparator means; said output of said comparator being a binary bit output; means of coupling said binary bit output to an external circuitry; said previous bit's generated reference voltage coupled through said switching means being coupled to said cathode of said precision diode means; said coupling of said previous bit's generated reference voltage through said switching means and to said cathode of said precision diode generating a resultant reference voltage for the next less significant bit; a plurality of said first analog-to-digital converter bits being connected in series with said resultant reference voltage for the next less significant bit being coupled to said previous bit's generated reference voltage of the next less significant bit to make a plurality of binary output bits.
Claim 13
Dependent Claim
25 words
The analog-to-digital converter of claim 10, wherein said summing means includes a charged capacitor with a polarity opposite of said previous bit's generated reference voltage.
Claim 14
Dependent Claim
28 words
The analog-to-digital converter of claim 11, wherein a charging means for said capacitor being said set reference voltages coupled through a switching means responsive to an external input.
Claim 15
Dependent Claim
18 words
The analog-to-digital converter of claim 10, wherein said summing circuit means includes a series of semiconductor diode elements.
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| 3.5 Years (Year 4) | 1994-02-18 | 1994-08-20 | 1995-02-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-02-18 | 1998-08-20 | 1999-02-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-02-18 | 2002-08-20 | 2003-02-19 | $7700.00 | Window Closed / Lapsed |