Analog-to-digital converter

Claim 2

In an analog-to-digital converter, a first converter stage comprising: first and second conduction paths; first and second impedance means serially included respectively in said first and second conduction paths; first switching means connected in parallel with said first impedance means and having a first input voltage terminal; said first switching means shunting said first impedance means when the voltage at said first input voltage terminal reaches a first predetermined level, a first potential level connected to one end of said second conduction path and through a first resistance to one end of said first conduction path; output means connected to said one end of each of said first and second conduction paths; and a second potential level connected to the opposite end of each of said first and second conduction paths.

Claim 3

In an analog-to-digital converter in accordance with claim 1; second switching means connected in parallel with said second impedance means and having a second input voltage terminal; said second switching means shunting said second impedance means when the voltage at said second input voltage terminal reaches a second predetermined level, and a second resistance serially included between said first potential level and said one end of said second conduction path.

Claim 4

In an analog-to-digital converter in accordance with claim 2, a second converter stage comprising: third and fourth conduction paths; third and fourth impedance means serially included respectively in said third and fourth conduction paths; third switching means connected in parallel with said third impedance means and having a third input voltage terminal; said third switching means shunting said third impedance means when the voltage at said third input voltage terminal reaches a third predetermined level, fourth switching means connected in parallel with said fourth impedance means and having a fourth input voltage terminal; said fourth switching means shunting said fourth impedance means when the voltage at said fourth input voltage terminal reaches a fourth predetermined level; and said third and fourth conduction paths being serially connected respectively between said first and second paths and said second potential level.

Claim 5

In an analog-to-digital converter in accordance with claim 3, a common analog input signal terminal connected to said first, second, third and fourth input voltage terminals.

Claim 6

An analog-to-digital converter in accordance with claim 4 wherein said output means comprises differencing means.

Claim 7

An analog-to-digital converter in accordance with claim 5 wherein said first, second, third and fourth switching means comprise respectively a first, a second, a third and a fourth transistor whose individual collector and emitter electrodes are connected respectively in parallel with said first, second, third and fourth impedance means; and wherein said first, second, third and fourth input voltage terminals are individually connected to the respective base electrodes of said first, second, third and fourth transistors.

Claim 8

An analog-to-digital converter in accordance with claim 6 further comprising first, second, third, and fourth resistances serially included in said first, second, third, and fourth conduction paths for respectively establishing said first, second, third, and fourth predetermined levels.

Claim 9

An analog-to-digital converter in accordance with claim 7 comprising a balancing resistor serially connected in one of said first, second, third and fourth conduction paths.

Claim 10

An analog-to-digital converter comprising two voltage-divider conduction paths connected in parallel between first and second potential levels, each said conduction path including serially connected therein variable resistance means including a signal input terminal, the resistance of said variable resistance means being inversely proportional to the quantized magnitude of a signal appearing at said input terminal; an analog signal input path connected in common to said signal input terminal in each of said voltage-divider paths; and digital output means including means connected to each of sAid voltage-divider paths for determining the difference in resistance between said variable resistance means in said voltage-divider paths.

Claim 11

An analog-to-digital converter comprising two voltage-divider conduction paths connected in parallel between first and second potential levels, each said conduction path including serially connected therein variable resistance means including a signal input terminal, the resistance of said variable resistance means being inversely proportional to the quantized magnitude of a signal appearing at said input terminal; an analog signal input path connected in common to said signal input terminal in each of said voltage-divider paths; and digital output means including means connected to each of sAid voltage-divider paths for determining the difference in resistance between said variable resistance means in said voltage-divider paths.

Claim 12

In a multidigit analog-to-digital converter; a plurality of single digit converters individually comprising first and second conduction paths, a common analog signal input terminal, first and second variable resistance means respectively included in said first and second conduction paths and connected to said common input terminal, the respective magnitudes of said first and second variable resistance means being alternately varied in accordance with the quantized magnitude of the analog signal at said common input terminal, and digital output means including detection means connected to said first and second conduction paths for detecting the difference in magnitude between said first and second variable resistance means.

Claim 13

In a multidigit analog-to-digital converter; a plurality of single digit converters individually comprising first and second conduction paths, a common analog signal input terminal, first and second variable resistance means respectively included in said first and second conduction paths and connected to said common input terminal, the respective magnitudes of said first and second variable resistance means being alternately varied in accordance with the quantized magnitude of the analog signal at said common input terminal, and digital output means including detection means connected to said first and second conduction paths for detecting the difference in magnitude between said first and second variable resistance means.

Claim 14

In a multidigit analog-to-digital converter in accordance with claim 10 wherein said plurality of single digit converters are substantially identical to one another, a plurality of input paths respectively associated with said plurality of single digit converters, each said input path being individually connected to said common input terminal of said associated converter, and individual signal magnitude variation means respectively included in each of said input paths.

Claim 15

A multidigit analog-to-digital converter comprising: a plurality of identical decision circuits; said decision circuits each comprising an individual signal input terminal and means for generating alternately a first and a second output signal as the magnitude of the signal at said individual signal input terminal successively exceeds a plurality of predetermined levels; a common analog signal input terminal; and a plurality of individual signal magnitude variation means respectively connecting each of said individual signal input terminals to said common analog signal input terminal.

Claim 16

A multidigit analog-to-digital converter comprising: a plurality of identical decision circuits; said decision circuits each comprising an individual signal input terminal and means for generating alternately a first and a second output signal as the magnitude of the signal at said individual signal input terminal successively exceeds a plurality of predetermined levels; a common analog signal input terminal; and a plurality of individual signal magnitude variation means respectively connecting each of said individual signal input terminals to said common analog signal input terminal.