US4994407A — Radiation hardened field oxides for NMOS and CMOS…

Claim 1

Independent Claim 190 words

A process for hardening an NMOS device having a P doped silicon substrate or a P well serving as the substrate, comprising the following steps: masking a region on the substrate where the device will be formed; oxidizing the unmasked P doped substrate to form field oxide in and above the silicon substrate and surrounding the region; establishing a peripheral notch in the field oxide about the region which exposes the substrate within the notch; implanting the so-exposed substrate with boron to create a degenerately doped region in the exposed substrate; growing a thin oxide to partially fill the notch and cover the exposed substrate to form a thin oxide region within the notch surrounding the region for the device to enhance the field oxide isolation in a radiation harsh environment whereby when radiation breaks down the thick field oxide, said degenerately doped region maintains high voltage threshold in the thin oxide region to maintain radiation hardness; and, unmasking said region and forming said device in said region and further comprising depositing and delineating interconnect conductors over the field oxide on the unnotched portions thereof and on the thin oxide.

Claim 2

Dependent Claim 190 words

A process for hardening an NMOS device having a P doped silicon substrate or a P well serving as the substrate, comprising the following steps: masking a region on the substrate where the device will be formed; oxidizing the unmasked P doped substrate to form field oxide in and above the silicon substrate and surrounding the region; establishing a peripheral notch in the field oxide about the region which exposes the substrate within the notch; implanting the so-exposed substrate with boron to create a degenerately doped region in the exposed substrate; growing a thin oxide to partially fill the notch and cover the exposed substrate to form a thin oxide region within the notch surrounding the region for the device to enhance the field oxide isolation in a radiation harsh environment whereby when radiation breaks down the thick field oxide, said degenerately doped region maintains high voltage threshold in the thin oxide region to maintain radiation hardness; and, unmasking said region and forming said device in said region and further comprising depositing and delineating interconnect conductors over the field oxide on the unnotched portions thereof and on the thin oxide.

Claim 3

Dependent Claim 45 words

The process of claim 1 wherein: said doping for a P doped substrate is P+ having a concentration which is equal to or exceeds 10 18 atoms per cubic centimeter to increase the threshold voltage of the thin oxide in the region of the notch.

Claim 4

Dependent Claim 27 words

The process of claim 1 wherein: the thin portion of the field oxide is of the order of 1 to 2 microns wide due to said notch.

Claim 5

Dependent Claim 54 words

The process of claim 1 wherein: the thickness of the thin field oxide is made to be of the order of 1/2 or less than the thickness of the unnotched field oxide, said thin field oxide having a thickness of approximately 2000 Å because the thinner the thin oxide, the higher the radiation tolerance.

Claim 6

Dependent Claim 56 words

The process of claim 1 further comprising the forming of a PMOS device in association with a NMOS device to form a CMOS device wherein said field oxide which includes a notch about the NMOS device comprises at least the spacing between said devices, and each device is surrounded by a notch in the field oxide.

Claim 7

Dependent Claim 47 words

The process of claim 1 wherein said establishing a notch in the field oxides comprises: notching through the field oxide to the substrate; and, growing field oxide in the notch to a thickness of the order of 1/2 or less than the field oxide which is unnotched.

Claim 8

Dependent Claim 137 words

A process for making hardened NMOS devices each disposed in and above P doped silicon substrates, comprising the following steps: selectively oxidizing the substrate around the regions where each device is being formed to establish field oxide in and above the silicon substrate which field oxide surrounds each of said regions; notching through the field oxide to the substrate to form a peripheral notch extending around each device; heavily doping the substrate through and beneath the notches degenerately to enhance the field oxide isolation; growing field oxide in the notches to a thickness of the order of 1/2 or less than the field oxide which in unnotched; and forming said devices in said regions, respectively and further comprising depositing and delineating interconnect conductors over the field oxide on the unnotched portions thereof and on the thin oxide.

Claim 9

Dependent Claim 137 words

A process for making hardened NMOS devices each disposed in and above P doped silicon substrates, comprising the following steps: selectively oxidizing the substrate around the regions where each device is being formed to establish field oxide in and above the silicon substrate which field oxide surrounds each of said regions; notching through the field oxide to the substrate to form a peripheral notch extending around each device; heavily doping the substrate through and beneath the notches degenerately to enhance the field oxide isolation; growing field oxide in the notches to a thickness of the order of 1/2 or less than the field oxide which in unnotched; and forming said devices in said regions, respectively and further comprising depositing and delineating interconnect conductors over the field oxide on the unnotched portions thereof and on the thin oxide.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1994-02-18	1994-08-20	1995-02-19	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	1998-02-18	1998-08-20	1999-02-19	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2002-02-18	2002-08-20	2003-02-19	$7700.00	Window Closed / Lapsed

Radiation hardened field oxides for NMOS and CMOS-bulk and process for forming

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