Patent US4980745A successfully refreshed from Google Patents.
US4980745A
Expired / Lapsed
US
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Substrate potential detecting circuit
Assignee: Toshiba Corp
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Filing: 1990-05-15
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Granted: 1990-12-25
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Expires: 2010-05-15
Abstract
Abstract Diffusion layers are formed in a surface region of an N-type substrate. The diffusion layers are interconnected by means of an Al wiring layer. A P-well is formed in the substrate. A power source potential is connected to the substrate and a reference potential is connected to the P-well 17. The Al wiring layer is connected to the power source potential via the substrate to detect the power source potential.
Inventors
- 👤 Hiroki Muroga
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 15:24
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; G; G01; G01R; G01R31/00; G01R31/26; G01R31/27; G01R31/275; G01R19/00; G01R19/145; G01R19/155; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/60; H10D84/67; H10D84/673
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
134 words
A substrate potential detecting circuit comprising a semiconductor substrate of a first conductivity type in which a well region of a second conductivity type is formed; a first semiconductor region of the first conductivity type formed in said semiconductor substrate; a second semiconductor region of the second conductivity type formed in said semiconductor substrate, and separated from said first semiconductor region; a third semiconductor region of the first conductivity type formed in said semiconductor substrate and separated from said first and second semiconductor regions, the third semiconductor region being supplied with a potential for biasing said semiconductor substrate; and a wiring layer interconnecting said first and second semiconductor regions and serving as a potential detecting terminal for detecting the potential of said semiconductor substrate via said first semiconductor region of the first conductivity type.
Claim 2
Dependent Claim
134 words
A substrate potential detecting circuit comprising a semiconductor substrate of a first conductivity type in which a well region of a second conductivity type is formed; a first semiconductor region of the first conductivity type formed in said semiconductor substrate; a second semiconductor region of the second conductivity type formed in said semiconductor substrate, and separated from said first semiconductor region; a third semiconductor region of the first conductivity type formed in said semiconductor substrate and separated from said first and second semiconductor regions, the third semiconductor region being supplied with a potential for biasing said semiconductor substrate; and a wiring layer interconnecting said first and second semiconductor regions and serving as a potential detecting terminal for detecting the potential of said semiconductor substrate via said first semiconductor region of the first conductivity type.
Claim 3
Dependent Claim
72 words
A substrate potential detecting circuit according to claim 1, further comprising an inverter connected to said wiring layer to invert the level of output thereof, and a plurality of node-connecting elements connected between different nodes, control terminals of said node-connecting elements receiving the output signal of said wiring layer and the output signal of said inverter to selectively turn on said node-connecting elements so that nodes of the turned-on elements are interconnected.
Claim 4
Dependent Claim
16 words
A substrate potential detecting circuit according to claim 2, wherein said node-connecting elements are metal-oxide-semiconductor transistors.
Claim 5
Dependent Claim
86 words
A substrate potential detecting circuit according to claim 1, further comprising first, second and third nodes, a first node-connecting element connected between said first and second nodes and connected at the control terminal to said wiring layer, a second node-connecting element connected between said second and third nodes and connected at the control terminal to said wiring layer, wherein said first or second node-connecting element is turned on in response to a potential of said substrate, thereby interconnecting both the nodes of the turned-on node-connecting element.
Claim 6
Dependent Claim
19 words
A substrate potential detecting circuit according to claim 4, wherein said first and second node-connecting elements are metal-oxide-semiconductor transistors.
Claim 7
Dependent Claim
64 words
A substrate potential detecting circuit according to claim 4, further comprising a first circuit connected to said first node and a second circuit connected to said fourth node, wherein when said first node-connecting element is turned on, said first circuit is connected to said second node, and when said second node-connecting element is turned on, said second circuit is connected to said third node.
Claim 8
Dependent Claim
63 words
A substrate potential detecting circuit according to claim 6, wherein the first conductivity type of said semiconductor substrate is an N conductivity type, and the second conductivity type of said well region is a P conductivity type, a detected potential of said wiring layer is a power source potential, and, in response to the detected potential, said first node-connecting element is turned on.
Claim 9
Dependent Claim
19 words
A substrate potential detecting circuit according to claim 7, wherein said first and second node-connecting elements are metal-oxide-semiconductor transistors.
Claim 10
Dependent Claim
63 words
A substrate potential detecting circuit according to claim 6, wherein the first conductivity type of said semiconductor substrate is a P conductivity type, and the second conductivity type of said well region is a N conductivity type, a detected potential of said wiring layer is a power source potential, and, in response to the detected potential, said second node-connecting element is turned on.
Claim 11
Dependent Claim
19 words
A substrate potential detecting circuit according to claim 9, wherein said first and second node-connecting elements are metal-oxide-semiconductor transistors.
Claim 12
Dependent Claim
19 words
A substrate potential detecting circuit according to claim 6, wherein said first and second node-connecting elements are metal-oxide-semiconductor transistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-12-24 | 1994-06-25 | 1994-12-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-12-24 | 1998-06-25 | 1998-12-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-12-24 | 2002-06-25 | 2002-12-25 | $7700.00 | Window Closed / Lapsed |