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US4975698A
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Modified quasi-gray digital encoding technique
Assignee: Raytheon Co
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Filing: 1989-12-08
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Granted: 1990-12-04
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Expires: 2009-12-08
Abstract
Abstract A modified quasi-Gray encoding technique for use in parallel analog-to-digital converters that significantly reduces errors resulting from multiple simultaneous inputs. The encoding technique converts a one-in-(2 n -1) digital code into an n-bit binary word that is the same as quasi-Gray code in all but its least significant bit position, which alternates in the same manner as standard binary code. For many multiple simultaneous inputs, the modified quasi-Gray code substantially reduces errors when compared with quasi-Gray code. For example, the modified quasi-Gray code reduces the maximum error from 3 to 2 for two simultaneous inputs separated by two bit positions (n=8). In a typical parallel analog-to-digital converter employing the modified quasi-Gray code, the one-in-(2 n -1) digital code is converted into modified quasi-Gray code using a read-only memory. The modified quasi-Gray-encoded output of the read-only memory is then converted into standard binary code by a logic circuit requiring only a single gate delay.
Inventors
- 👤 Mark R. Kagey
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 10:08
CPC Classifications
H; H03; H03M; H03M7/00; H03M7/14; H03M7/16; H03M1/00; H03M1/12; H03M1/34; H03M1/36
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
169 words
A digital encoder for use in an analog-to-digital converter, comprising: transition detection means for detecting a transition point between binary states in an input signal, the transition detection means generating an output signal indicative of the transition point; binary encoding means for receiving the output signal from the transition detection means, the binary encoding means converting the output signal into an n-bit binary word having the properties c.sub.n =b.sub.n c.sub.i =b.sub.i if c.sub.i+1 =1 c.sub.i =b.sub.i if c.sub.i+1 =0 and c.sub.0 =b.sub.O where c n is the most significant bit, c i is the i-th bit and c 0 is the least significant bit of the n-bit word and b i is the i-th bit, b i is the inverse of the i-th bit, b n is the most significant bit and b 0 is the least significant bit of the n-bit word in standard binary code, the index i varying from n-1 to 1; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 2
Dependent Claim
169 words
A digital encoder for use in an analog-to-digital converter, comprising: transition detection means for detecting a transition point between binary states in an input signal, the transition detection means generating an output signal indicative of the transition point; binary encoding means for receiving the output signal from the transition detection means, the binary encoding means converting the output signal into an n-bit binary word having the properties c.sub.n =b.sub.n c.sub.i =b.sub.i if c.sub.i+1 =1 c.sub.i =b.sub.i if c.sub.i+1 =0 and c.sub.0 =b.sub.O where c n is the most significant bit, c i is the i-th bit and c 0 is the least significant bit of the n-bit word and b i is the i-th bit, b i is the inverse of the i-th bit, b n is the most significant bit and b 0 is the least significant bit of the n-bit word in standard binary code, the index i varying from n-1 to 1; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 3
Dependent Claim
48 words
The digital encoder as set forth in claim 1, and further including: binary decoding means for receiving the n-bit binary word from the binary encoding means, the binary decoding means converting the n-bit binary word into standard binary code; wherein b.sub.n =c.sub.n b.sub.i =c.sub.i ⊕c.sub.i+1 and b.sub.0 =c.sub.0.
Claim 4
Dependent Claim
106 words
A digital encoder for use in an analog-to-digital converter, comprising: transition detection means for detecting a transition point between binary states in an input signal, the transition detection means generating an output signal indicative of the transition point; binary encoding means for receiving the output signal from the transition detection means, the binary encoding means converting the output signal into an n-bit binary word having the properties of quasi-Gray code in all but its least significant bit position, the least significant bit position alternating in the same manner as standard binary code; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 5
Dependent Claim
106 words
A digital encoder for use in an analog-to-digital converter, comprising: transition detection means for detecting a transition point between binary states in an input signal, the transition detection means generating an output signal indicative of the transition point; binary encoding means for receiving the output signal from the transition detection means, the binary encoding means converting the output signal into an n-bit binary word having the properties of quasi-Gray code in all but its least significant bit position, the least significant bit position alternating in the same manner as standard binary code; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 6
Dependent Claim
39 words
The digital encoder as set forth in claim 3, and further including: binary decoding means for receiving the n-bit binary word from the binary encoding means, the binary decoding means converting the n-bit binary word into standard binary code.
Claim 7
Dependent Claim
148 words
A digital encoding method for use in an analog-to-digital converter, comprising the steps of: detecting a transition point between binary states in an input signal; generating an output signal indicative of the transition point; converting the output signal into an n-bit binary word having the properties c.sub.n =b.sub.n c.sub.i =b.sub.i if c.sub.i+1 =1 c.sub.i =b.sub.i if c.sub.i+1 =0 and c.sub.0 =b.sub.0 where c n is the most significant bit, c i is the i-th bit and c 0 is the least significant bit of the n-bit word and b i is the i-th bit, b i is the inverse of the i-th bit, b n is the most significant bit and b 0 is the least significant bit of the n-bit word in standard binary code, the index i varying from n-1 to 1; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 8
Dependent Claim
148 words
A digital encoding method for use in an analog-to-digital converter, comprising the steps of: detecting a transition point between binary states in an input signal; generating an output signal indicative of the transition point; converting the output signal into an n-bit binary word having the properties c.sub.n =b.sub.n c.sub.i =b.sub.i if c.sub.i+1 =1 c.sub.i =b.sub.i if c.sub.i+1 =0 and c.sub.0 =b.sub.0 where c n is the most significant bit, c i is the i-th bit and c 0 is the least significant bit of the n-bit word and b i is the i-th bit, b i is the inverse of the i-th bit, b n is the most significant bit and b 0 is the least significant bit of the n-bit word in standard binary code, the index i varying from n-1 to 1; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 9
Dependent Claim
34 words
The digital encoding method as set forth in claim 5, and further including the step of: converting the n-bit binary word into standard binary code; wherein b.sub.n =c.sub.n b.sub.i =c.sub.i ⊕c.sub.i+1 and b.sub.0 =c.sub.0.
Claim 10
Dependent Claim
85 words
A digital encoding method for use in an analog-to-digital converter, comprising the steps of: detecting a transition point between binary states in an input signal; generating an output signal indicative of the transition point; converting the output signal into an n-bit binary word having the properties of quasi-Gray code in all but its least significant bit position, the least significant bit position alternating in the same manner as standard binary code; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 11
Dependent Claim
85 words
A digital encoding method for use in an analog-to-digital converter, comprising the steps of: detecting a transition point between binary states in an input signal; generating an output signal indicative of the transition point; converting the output signal into an n-bit binary word having the properties of quasi-Gray code in all but its least significant bit position, the least significant bit position alternating in the same manner as standard binary code; whereby errors arising from multiple transition points in the input signal are significantly reduced.
Claim 12
Dependent Claim
25 words
The digital encoding method as set forth in claim 7, and further including the step of: converting the n-bit binary word into standard binary code.
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