High performance flight recorder

Claim 1

A recording device for recording information comprising: an input/output interface circuit; a data storage memory connected to said input/output interface circuit for storing data, said data storage memory being partitioned into memory pages of programable size; a direct memory access circuit for controlling the input and output of data to and from said data storage memory; address and data lines interconnecting said direct memory access circuit and said data storage memory; a central processing unit connected to said direct memory access circuit; a program memory connected to said central processing unit for storing the operational program for the recording device, said program memory having a test data pattern for memory testing of said data storage memory by cycling the test data pattern throughout the memory pages of said data storage memory to determine good memory pages under control of said central processing unit, and error detection and correction means connected to said direct memory access circuit and to said input/output circuit for detecting and correcting errors, said error detection and correction means comprising means for appending a check code word to said data and for indicating to said input/output interface circuit the error status when data are read from said data storage memory and for correcting errors when they are detected, means for determining memory pages with non-correctable errors, test means for testing said address and data lines interconnecting said direct memory access circuit and said data storage memory and means for using the test data pattern of said program memory to test the function of said error detection and correction coding means.