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US4969087A Expired / Lapsed US ⏱️ 0.0 years remaining

Single-chip microcomputer

Assignee: Oki Electric Industry Co Ltd
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Filing: 1987-11-04
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Granted: 1990-11-06
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Expires: 2007-11-04
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Abstract

Abstract In an evaluation single-chip microcomputer which includes circuit elements connected to an internal bus and capable of storing data or of arithmetic operation, the contents of the circuit elements being required to be known outside of the microcomputer, a control circuit decodes instructions supplied through the internal bus and produces control signals for controlling the operations of the circuit elements, the data written in each of the circuit elements is transmitted to the internal bus during execution of any one of instructions involving transfer of data into the circuit element, and output terminals are provided for outputting part of the control signals from the control circuit and part of the output signals from the circuit elements through the internal bus, the control signals including write control signals for writing data in the circuit elements.

Inventors

  • 👤 Kouji Tanagawa
  • 👤 Tomoaki Yoshida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 10:54
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/36; G06F11/362; G06F11/3648; G06F11/30; G06F11/34; G06F11/3466; G06F15/00; G06F15/76; G06F15/78; G06F15/7839; G06F15/7842; G06F15/786; G06F11/348

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 247 words
A method of evaluating a single-chip microcomputer, comprising the steps of: (a) providing an evaluation single-chip microcomputer which includes an internal bus having external bus terminals, circuit elements for connection to said internal bus and capable of storing data or or arithmetic operation, the contents of the circuit elements being required to be known outside of the microcomputer, a control circuit means for decoding instructions supplied through the internal bus and producing control signals for controlling the operations of said circuit elements, means, responsive to the control signals from the control circuit means, for selectively connecting said circuit elements to the internal bus during execution of predetermined instructions, and output terminals for outputting at least part of the control signals from the control circuit means, said control signals including write control signals for writing data into said circuit elements, (b) providing, outside the microcomputer, shadow circuit elements corresponding to the circuit elements inside the microcomputer whose contents should be examined for the evaluation, (c) providing, outside the microcomputer, an external memory storing a program to be evaluated, (d) connecting the output of the external memory to the external bus terminals, (e) connecting the shadow circuit elements to receive data from the external bus terminals and to receive control signals, (f) causing the program stored in the external memory to be executed, and (g) indirectly observing and tracing in real time the contents of the circuit elements inside the microcomputer by reference to the corresponding shadow circuit elements.
Claim 2
Independent Claim 247 words
A method of evaluating a single-chip microcomputer, comprising the steps of: (a) providing an evaluation single-chip microcomputer which includes an internal bus having external bus terminals, circuit elements for connection to said internal bus and capable of storing data or or arithmetic operation, the contents of the circuit elements being required to be known outside of the microcomputer, a control circuit means for decoding instructions supplied through the internal bus and producing control signals for controlling the operations of said circuit elements, means, responsive to the control signals from the control circuit means, for selectively connecting said circuit elements to the internal bus during execution of predetermined instructions, and output terminals for outputting at least part of the control signals from the control circuit means, said control signals including write control signals for writing data into said circuit elements, (b) providing, outside the microcomputer, shadow circuit elements corresponding to the circuit elements inside the microcomputer whose contents should be examined for the evaluation, (c) providing, outside the microcomputer, an external memory storing a program to be evaluated, (d) connecting the output of the external memory to the external bus terminals, (e) connecting the shadow circuit elements to receive data from the external bus terminals and to receive control signals, (f) causing the program stored in the external memory to be executed, and (g) indirectly observing and tracing in real time the contents of the circuit elements inside the microcomputer by reference to the corresponding shadow circuit elements.
Claim 3
Dependent Claim 54 words
A method according to claim 1, wherein step (e) is conducted so that a write control signal is applied to a shadow circuit element for writing data into the respective shadow circuit element from the external bus terminals when the content of a corresponding circuit element inside the microcomputer is on the internal bus.
Claim 4
Dependent Claim 56 words
A method according to claim 1, wherein step (e) is conducted so that a write control signal is applied to a shadow circuit element for writing data into the respective shadow circuit element from the external bus terminals when a write control signal for writing data in a corresponding circuit element inside the microcomputer is produced.
Claim 5
Dependent Claim 48 words
A method according to claim 1, wherein step (a) further comprises providing an evaluation single-chip microcomputer which additionally includes a program counter and additional output terminals for outputting the content of the program counter, and wherein step (f) comprises connecting the additional output terminals to the external memory.
Claim 6
Dependent Claim 203 words
An evaluation single-chip microcomputer, comprising an internal bus having external bus terminals, circuit elements for connection to said internal bus and capable of storing data or of arithmetic operation, the contents of the circuit elements being required to be known outside of the microcomputer, a control circuit means for decoding instructions supplied through the internal bus and producing control signal for controlling the operations of said circuit elements, means, responsive to the control signals from the control circuit means, for selectively connecting said circuit elements to the internal bus during execution of predetermined instructions, and output terminals for outputting at least part of the control signals from the control circuit means, said control signals including write control signals for writing data into said circuit elements, wherein, during evaluation, said control circuit means receives instructions from outside of the microcomputer, wherein said microcomputer further comprises a program memory to store a program, wherein said means for selectively connecting includes means for transmitting instructions from the program memory to the internal bus when a program stored in the program memory is to be executed, and wherein said control circuit means prevents said means for transmitting instructions from transmitting instructions from said program memory during evaluation.
Claim 7
Dependent Claim 203 words
An evaluation single-chip microcomputer, comprising an internal bus having external bus terminals, circuit elements for connection to said internal bus and capable of storing data or of arithmetic operation, the contents of the circuit elements being required to be known outside of the microcomputer, a control circuit means for decoding instructions supplied through the internal bus and producing control signal for controlling the operations of said circuit elements, means, responsive to the control signals from the control circuit means, for selectively connecting said circuit elements to the internal bus during execution of predetermined instructions, and output terminals for outputting at least part of the control signals from the control circuit means, said control signals including write control signals for writing data into said circuit elements, wherein, during evaluation, said control circuit means receives instructions from outside of the microcomputer, wherein said microcomputer further comprises a program memory to store a program, wherein said means for selectively connecting includes means for transmitting instructions from the program memory to the internal bus when a program stored in the program memory is to be executed, and wherein said control circuit means prevents said means for transmitting instructions from transmitting instructions from said program memory during evaluation.
Claim 8
Dependent Claim 127 words
A single-chip microcomputer, comprising: an internal bus having at least one external bus terminal; a plurality of circuit elements, one of the circuit elements being a data memory having a control signal input port; means for selectively coupling the circuit elements to the bus; control circuit means for decoding instructions supplied through the bus and producing a plurality of control signals for controlling the operations of the circuit elements, one of the control signals being a write control signal which is applied to the control signal input port of the data memory; and an external output terminal which is connected to the control circuit means and which receives the write control signal when the control signal input port of the data memory receives the write control signal.
Claim 9
Dependent Claim 127 words
A single-chip microcomputer, comprising: an internal bus having at least one external bus terminal; a plurality of circuit elements, one of the circuit elements being a data memory having a control signal input port; means for selectively coupling the circuit elements to the bus; control circuit means for decoding instructions supplied through the bus and producing a plurality of control signals for controlling the operations of the circuit elements, one of the control signals being a write control signal which is applied to the control signal input port of the data memory; and an external output terminal which is connected to the control circuit means and which receives the write control signal when the control signal input port of the data memory receives the write control signal.
Claim 10
Dependent Claim 74 words
The microcomputer of claim 6, wherein one of the circuit elements is an accumulator having a control signal input port, wherein one of the control signals produced by the control circuit means is an additional write control signal which is applied to the control signal input port of the accumulator, and further comprising an additional external output terminal which is connected to the control circuit means and which carries the additional write control signal.
Claim 11
Dependent Claim 74 words
The microcomputer of claim 6, wherein one of the circuit elements is an instruction register having a control signal input port, wherein one of the control signals produced by the control circuit means is another write control signal which is applied to the control signal input port of the instruction register, and further comprising another external output terminal which is connected to the control circuit means and which carries the another write control signal.
Claim 12
Dependent Claim 89 words
The microcomputer of claim 6, wherein one of the circuit elements is a data pointer having first, second, and third control signal input ports, wherein among the control signals produced by the control circuit means are first, second, and third control signals which are applied respectively to the first, second, and third input ports of the data pointer, and further comprising external first, second, and third data pointer output terminals which are connected to the control circuit means and which respectively carry the first, second, and third control signals.
Claim 13
Dependent Claim 34 words
The microcomputer of claim 9, wherein the first control signal is a write control signal, wherein the second control signal is an increment signal, and wherein the third control signal is a decrement signal.
Claim 14
Dependent Claim 38 words
The microcomputer of claim 6, wherein one of the circuit elements is an ALU, and further comprising a carry flag connected to the ALU, and an external carry flag register output terminal connected to the carry flag register.
Claim 15
Dependent Claim 124 words
A single-chip microcomputer, comprising: an internal bus having at least one external bus terminal; a plurality of circuit elements, one of the circuit elements being an accumulator having a control signal input port; means for selectively coupling the circuit elements to the bus; control circuit means for decoding instructions supplied through the bus and producing a plurality of control signals for controlling the operations of the circuit elements, one of the control signals being a write control signal which is applied to the control signal input port of the accumulator; and an external output terminal which is connected to the control circuit means and which receives the write control signal when the control signal input port of the accumulator receives the write control signal.
Claim 16
Dependent Claim 124 words
A single-chip microcomputer, comprising: an internal bus having at least one external bus terminal; a plurality of circuit elements, one of the circuit elements being an accumulator having a control signal input port; means for selectively coupling the circuit elements to the bus; control circuit means for decoding instructions supplied through the bus and producing a plurality of control signals for controlling the operations of the circuit elements, one of the control signals being a write control signal which is applied to the control signal input port of the accumulator; and an external output terminal which is connected to the control circuit means and which receives the write control signal when the control signal input port of the accumulator receives the write control signal.
Claim 17
Dependent Claim 76 words
The microcomputer of claim 12, wherein one of the circuit elements is a data memory having a control signal input port, wherein one of the control signals produced by the control circuit means is an additional write control signal which is applied to the control signal input port of the data memory, and further comprising an additional external output terminal which is connected to the control circuit means and which carries the additional write control signal.
Claim 18
Dependent Claim 74 words
The microcomputer of claim 12, wherein one of the circuit elements is an instruction register having a control signal input port, wherein one of the control signals produced by the control circuit means is another write control signal which is applied to the control signal input port of the instruction register, and further comprising another external output terminal which is connected to the control circuit means and which carries the another write control signal.
Claim 19
Dependent Claim 89 words
The microcomputer of claim 12, wherein one of the circuit elements is a data pointer having first, second, and third control signal input ports, wherein among the control signals produced by the control circuit means are first, second, and third control signals which are applied respectively to the first, second, and third input ports of the data pointer, and further comprising external first, second, and third data pointer output terminals which are connected to the control circuit means and which respectively carry the first, second, and third control signals.
Claim 20
Dependent Claim 34 words
The microcomputer of claim 15, wherein the first control signal is a write control signal, wherein the second control signal is an increment signal, and wherein the third control signal is a decrement signal.
Claim 21
Dependent Claim 38 words
The microcomputer of claim 12, wherein one of the circuit elements is an ALU, and further comprising a carry flag register connected to the ALU, and an external carry flag output terminal connected to the carry flag register.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-11-05 1994-05-07 1994-11-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-11-05 1998-05-07 1998-11-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-11-05 2002-05-07 2002-11-06 $7700.00 Window Closed / Lapsed

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