US4788683A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Data processing system emulation with microprocessor in place
Assignee: International Business Machines Corp
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Filing: 1988-01-07
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Granted: 1988-11-29
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Expires: 2008-01-07
Abstract
Abstract Apparatus is provided for testing a data processing system which includes a microprocessor, the testing occurring with the microprocessor in place in the system. The apparatus comprises: a support microprocessor for controlling the testing, a serial-to-parallel and parallel-to-serial converter connected between the support microprocessor and the system microprocessor, means for supplying a series of level sensitive scan design (LSSD) test signals from the support microprocessor through the converter to the system microprocessor, and means for returning the results of the level sensitive scan design test signals from the system microprocessor through the converter to the support microprocessor.
Inventors
- 👤 Phillip D. Hester
- 👤 William M. Johnson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 03:30
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/261; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/3181; G01R31/3185; G01R31/318505; G01R31/318533; G01R31/318572; G06F11/273; G06F11/2733
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
190 words
Apparatus for testing a data processing system including a microprocessor, said testing occurring with said microprocessor in place in said system, said apparatus comprising: a support microprocessor for controlling said testing; a serial-to-parallel and parallel-to-serial converter connected between said support microprocessor and said system microprocessor; means for supplying a series of parallel level sensitive scan design test signals from said support microprocessor through the parallel-to-serial portion of said converter to supply a series of serial test signals to said system microprocessor; said system microprocessor having both low level and high level functions to be tested; additional internal logic within said system microprocessor to support said low level testing functions of said system microprocessor in response to said level sensitive scan design test signals; said support microprocessor providing signals for testing both said low level testing functions and said high level testing functions for testing said system microprocessor; and means for returning the serial results of said low and said high level sensitive scan design test signals from said system microprocessor through the serial-to-parallel portion of said converter to supply a series of parallel test signal results to said support microprocessor.
Claim 2
Dependent Claim
190 words
Apparatus for testing a data processing system including a microprocessor, said testing occurring with said microprocessor in place in said system, said apparatus comprising: a support microprocessor for controlling said testing; a serial-to-parallel and parallel-to-serial converter connected between said support microprocessor and said system microprocessor; means for supplying a series of parallel level sensitive scan design test signals from said support microprocessor through the parallel-to-serial portion of said converter to supply a series of serial test signals to said system microprocessor; said system microprocessor having both low level and high level functions to be tested; additional internal logic within said system microprocessor to support said low level testing functions of said system microprocessor in response to said level sensitive scan design test signals; said support microprocessor providing signals for testing both said low level testing functions and said high level testing functions for testing said system microprocessor; and means for returning the serial results of said low and said high level sensitive scan design test signals from said system microprocessor through the serial-to-parallel portion of said converter to supply a series of parallel test signal results to said support microprocessor.
Claim 3
Dependent Claim
21 words
Apparatus in accordance with claim 1 including interface and control logic means connected between said support processor and said converter means.
Claim 4
Dependent Claim
43 words
Apparatus in accordance with claim 2 including; storage means; storage controller means connected to said storage means; and means connecting said support processor to said storage control means to permit said support processor to test said storage controller means and said storage means.
Claim 5
Dependent Claim
27 words
Apparatus in accordance with claim 3 in which said interface and control logic means comprises said means for connecting said support processor to said storage controller means.
Claim 6
Dependent Claim
21 words
Apparatus in accordance with claim 3 in which said storage means includes random access memory means and read only storage means.
Claim 7
Dependent Claim
29 words
Apparatus in accordance with claim 2 including: a clock generator; and means connecting said clock generator to said system microprocessor and to said interface and said control logic means.
Claim 8
Dependent Claim
44 words
Apparatus in accordance with claim 1 in which said additional internal logic within said system microprocessor to support the low level testing functions of said system microprocessor includes a first comparator for comparing instruction addresses and a second comparator for comparing instruction operation codes.
Claim 9
Dependent Claim
19 words
Apparatus in accordance with claim 7 including selection logic for selecting either said first comparator or said second comparator.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-11-29 | 1992-05-30 | 1992-11-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-11-29 | 1996-05-30 | 1996-11-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-11-29 | 2000-05-30 | 2000-11-29 | $7700.00 | Window Closed / Lapsed |