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US4967252A Expired / Lapsed US ⏱️ 0.0 years remaining

Compound semiconductor bipolar device with side wall contact

Assignee: Fujitsu Ltd
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Filing: 1989-03-15
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Granted: 1990-10-30
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Expires: 2009-03-15
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Abstract

Abstract A high-speed compound semiconductor device includes semiconductor layers of a group III-V alloy laminated in a vertical direction. The device uses a base electrode that contacts side walls and covers a step portion of a base layer. The device includes an intermediate layer positioned between and comprising a different semiconductor material than that of base and collector layers. The intermediate layer has a different etching rate than those of the base and collector layers. The intermediate layer can be a collector-side barrier layer formed between the collector and base layers in a HET or RHET device. The device of the present invention has reduced capacitance between the base and collector layers and reduced base layer resistance.

Inventors

  • 👤 Yuji Awano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 04:46
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/20; H10D64/27; H10D64/281; H10D10/00; H10D10/80; H10D10/821; H10D10/881; H10D48/00; H10D48/30; H10D48/32; H10D48/36; H10D48/362

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 107 words
A compound semiconductor device structure comprising: a substrate; a first layer comprising at least a first compound semiconductor, and including a mesa with a top contact area; an intermediate layer contacting said contact area of said first layer and comprising a second compound semiconductor; a second layer having a top portion, side walls, having a bottom portion contacting said intermediate layer in a region overlying said contact area, and comprising at least said first compound semiconductor; an electrode contacting at least one of said side walls and extending laterally outside of said contact area; and a third layer overlying said second layer comprising said first compound semiconductor.
Claim 2
Dependent Claim 107 words
A compound semiconductor device structure comprising: a substrate; a first layer comprising at least a first compound semiconductor, and including a mesa with a top contact area; an intermediate layer contacting said contact area of said first layer and comprising a second compound semiconductor; a second layer having a top portion, side walls, having a bottom portion contacting said intermediate layer in a region overlying said contact area, and comprising at least said first compound semiconductor; an electrode contacting at least one of said side walls and extending laterally outside of said contact area; and a third layer overlying said second layer comprising said first compound semiconductor.
Claim 3
Dependent Claim 28 words
A compound semiconductor device structure according to claim 1, wherein said intermediate layer includes eaves extending outside of said contact area, and wherein said electrode contacts said eaves.
Claim 4
Dependent Claim 23 words
A compound semiconductor device structure according to claim 2, further comprising: another electrode contacting said first layer and being spaced from said mesa.
Claim 5
Dependent Claim 22 words
A compound semiconductor device structure according to claim 1, further comprising: another intermediate layer sandwiched between said second and said third layers.
Claim 6
Dependent Claim 63 words
A compound semiconductor device structure according to claim 4, wherein said another intermediate layer is structured as a quantum well resonator and comprises: a barrier layer formed in a lower portion of said another intermediate layer; another barrier layer formed in an upper portion of said another intermediate layer;a nd a well layer snadwiched between said barrier layer and said another barrier layer.
Claim 7
Dependent Claim 31 words
A compound semiconductor device structure according to claim 5, wherein said barrier layer and said another barrier layer comprise one of AlAs and AlGaAs, and wherein said well layer comprises GaAs.
Claim 8
Dependent Claim 28 words
A compound semiconductor device structure according to claim 6, wherein said intermediate layer includes eaves extending outside of said contact area, and wherein said electrode contacts said eaves.
Claim 9
Dependent Claim 23 words
A compound semiconductor device structure according to claim 7, further comprising: another electrode contacting said first layer and being spaced from said mesa.
Claim 10
Dependent Claim 21 words
A compound semiconductor device structure according to claim 1, wherein said intermediate layer has an area corresponding to said contact area.
Claim 11
Dependent Claim 23 words
A compound semiconductor device structure according to claim 9, further comprising: another electrode contacting said first layer and being spaced from said mesa.
Claim 12
Dependent Claim 43 words
A compound semiconductor device structure according to claim 1, wherein said first and said second layers have respective band gaps and said intermediate layer has a band gap being wider than said band gap of said first layer and of said second layer.
Claim 13
Dependent Claim 43 words
A compound semiconductor device structure according to claim 11, wherein said second and third layers have respective band gaps and said second layer includes a barrier portion of said second compound semiconductor, said barrier portion comprising said top portion of said second layer.
Claim 14
Dependent Claim 34 words
A compound semiconductor device structure according to claim 12, wherein said barrier portion has a wider band gap than said band gap of said second layer and said band gap of said third layer.
Claim 15
Dependent Claim 28 words
A compound semiconductor device structure according to claim 13, wherein said intermediate layer includes eaves extending outside of said contact area, and wherein said electrode contacts said eaves.
Claim 16
Dependent Claim 23 words
A compound semiconductor device structure according to claim 14, further comprising: another electrode contacting said first layer and being spaced from said mesa.
Claim 17
Dependent Claim 21 words
A compound semiconductor device structure according to claim 13, wherein said intermediate layer has an area corresponding to said contact area.
Claim 18
Dependent Claim 23 words
A compound semiconductor device structure according to claim 16, further comprising: another electrode contacting said first layer and being spaced from said mesa.
Claim 19
Dependent Claim 29 words
A compound semiconductor device structure according to claim 4, wherein said second and third layers have respective band gaps and said another intermediate layer comprises said second compound semiconductor.
Claim 20
Dependent Claim 35 words
A compound semiconductor device structure according to claim 18, wherein said another intermediate layer has a wider band gap than said band gap of said second layer and said band gap of said third layer.

References Cited (Backward Citations)

US4712121A Cited
JPS61154071A Cited
EP0194497A2 Cited
US4835579A Cited
JPS61296765A Cited
JPS625659A Cited
JPS625658A Cited
JPS625660A Cited
JPS6285465A Cited
JPS6348859A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-10-29 1994-04-30 1994-10-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-10-29 1998-04-30 1998-10-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-10-29 2002-04-30 2002-10-30 $7700.00 Window Closed / Lapsed

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