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JPS625658A Expired / Lapsed JP ⏱️ 0.0 years remaining

Hetero junction bipolar transistor and manufacture thereof

Assignee: Panasonic Holdings Corp
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Filing: 1985-07-02
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Granted: —
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Expires: 2005-07-02
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Abstract

Abstract PURPOSE:To reduce the capacity by forming a semi-insulation between a collector region and a base electrode leading layer, and reducing the areas of emitter- base and base-collector junctions smaller than that of an emitter electrode leading semiconductor layer. CONSTITUTION:An SiO2 film is formed on a semi-insulating GaAs substrate 16, a resist mask is formed, and etched in a mesa shape to expose a collector electrode leading GaAs layer 17. Then, an Al1Ga1-xAs emitter layer 20 and a collector 18 are merely selectively etched from the section of the mesa to recess the emitter. Then, the resist is removed, and a semi-insulating AlyGa1-yAs film 22 and a P-type GaAs film 23 are formed. Then, a resist mask is formed on emitter and base forming portions, and etched to expose a collector electrode leading GaAs layer 17. Then, the resist and the SiO2 film are removed to form ohmic electrodes 34-26. Thus, the collector and emitter capacities are reduced while holding the easiness of leading the base electrode to improve high frequency characteristics.

Inventors

  • 👤 Kazuo Eda
  • 👤 江田 和生
  • 👤 Masaki Inada
  • 👤 稲田 雅紀
  • 👤 Toshimichi Oota
  • 👤 順道 太田

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-28 21:34
CPC Classifications
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