US4965578A
Expired / Lapsed
US
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High dynamic analog to digital counter
Assignee: Commissariat à l'Énergie Atomique et Aux Énergies Alternatives
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Filing: 1988-10-13
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Granted: 1990-10-23
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Expires: 2008-10-13
Abstract
Abstract An analog to digital converter comprises coarse (15, 16) and fine (24, 19) quantization. The coarse quantization is of the frequency-current type or frequency-voltage frequency type. The fine quantization measures the discharge period of a residual charge stored in an integration capacitor (3) at the end of the coarse quantization phase. The discharger of this capacitor includes a capacitor (14) for quantifying this discharge.
Inventors
- 👤 Robert Poujois
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 18:18
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/14; G; G01; G01T; G01T1/00; G01T1/16; G01T1/17; G01T1/171; H03M1/50; H03M1/54; H03M1/60
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
228 words
A high dynamic analog to digital converter, of the type comprising: (a) a means to integrate a signal to be quantified during a period, said means capable of accumulating charges originating from the signal to be quantified; (b) means to inject into the integration means quantified electric charges in a number proportional to said signal to be quantified, the injected charges being of a polarity inverse to the charges originating from the signal to be quantified, said injection means comprising a quantified charge generator provided with a quantization capacitor, firstly coupled to a reference voltage source of polarity opposite to that of the signal to be quantified; (c) fine counting means for counting a period proportional to discharge of the accumulated residual charge and calculate from this a low order value quantization of the signal; (d) said quantified charge generator and quantization capacitor, selectably switchable between the first reference voltage source and a ramp generator voltage source of polarity opposite to that of the signal to be quantified; (e) rough counting means for counting the number of injected quantified charges and calculate from these a high value quantization of the signal; (f) a triggered oscillator and control logic sequencer for alternatively coupling said quantization capacitor with the charge integrator input; and (g) a sequencer for alternatively coupling the reference voltage source and ramp generator to said quantization capacitor.
Claim 2
Dependent Claim
228 words
A high dynamic analog to digital converter, of the type comprising: (a) a means to integrate a signal to be quantified during a period, said means capable of accumulating charges originating from the signal to be quantified; (b) means to inject into the integration means quantified electric charges in a number proportional to said signal to be quantified, the injected charges being of a polarity inverse to the charges originating from the signal to be quantified, said injection means comprising a quantified charge generator provided with a quantization capacitor, firstly coupled to a reference voltage source of polarity opposite to that of the signal to be quantified; (c) fine counting means for counting a period proportional to discharge of the accumulated residual charge and calculate from this a low order value quantization of the signal; (d) said quantified charge generator and quantization capacitor, selectably switchable between the first reference voltage source and a ramp generator voltage source of polarity opposite to that of the signal to be quantified; (e) rough counting means for counting the number of injected quantified charges and calculate from these a high value quantization of the signal; (f) a triggered oscillator and control logic sequencer for alternatively coupling said quantization capacitor with the charge integrator input; and (g) a sequencer for alternatively coupling the reference voltage source and ramp generator to said quantization capacitor.
Claim 3
Dependent Claim
68 words
A converter as recited in claim 1, wherein the accumulation means comprise a plurality of capacitors, with a first capacitor connected initially to the input of an operational amplifier with integration means, and secondly to the output of said amplifier, and a second capacitor with a capacity greater than that of the first capacitor connected firstly to a constant potential and secondly to the output of said amplifier.
Claim 4
Dependent Claim
39 words
A converter as recited in claim 1, wherein the rough counting means and fine counting means comprise a common counter containing a first and a second separate input in order to receive the low and high order value quantizations.
Claim 5
Dependent Claim
39 words
A converter as recited in claim 2, wherein the rough counting means and fine counting means comprise a common counter containing a first and a second separate input in order to receive the low and high order value quantizations.
Claim 6
Dependent Claim
70 words
A converter as recited in claim 1, wherein the accumulation means comprise a plurality of capacitors, with a first capacitor connected initially to the input of an operational amplifier with integration means, and secondly to the output of said amplifier, and a second capacitor with a capacity greater than that of the first capacitor connected firstly to the input of the amplifier and secondly to the output of said amplifier.
Claim 7
Dependent Claim
253 words
A high dynamic analog to digital converter, of the type comprising: (a) a means to integrate a plurality of signals to be quantified during a period, said means capable of accumulating charges originating from the signals to be quantified; (b) means to inject into the integration means quantified electric charges in a number proportional to said signals to be quantified, the injected charges being of a polarity inverse to the charges originating from the signals to be quantified, said injection means comprising a quantified charge generator provided with a quantization capacitor, firstly coupled to a reference voltage source of polarity opposite to that of the signals to be quantified; (c) fine counting means for counting a period proportional to discharge of the accumulated residual charge and calculate from this a low order value quantization of the signals; (d) said quantified charge generator and quantization capacitor, selectably switchable between the first reference voltage source and a function generator voltage source of polarity opposite to that of the signal to be quantified; (e) rough counting means for counting the number of injected quantified charges and calculate from these a high value quantization of the signals; (f) a triggered oscillator and control logic sequencer for alternatively coupling said quantization capacitor with the charge integrator input; (g) a sequencer for alternatively coupling the reference voltage source and function generator to said quantization capacitor; and (h) a means to selectively measure and discharge a residual electric charge, including said charge generator and appropriately coupled to said quantization capacitor.
Claim 8
Dependent Claim
253 words
A high dynamic analog to digital converter, of the type comprising: (a) a means to integrate a plurality of signals to be quantified during a period, said means capable of accumulating charges originating from the signals to be quantified; (b) means to inject into the integration means quantified electric charges in a number proportional to said signals to be quantified, the injected charges being of a polarity inverse to the charges originating from the signals to be quantified, said injection means comprising a quantified charge generator provided with a quantization capacitor, firstly coupled to a reference voltage source of polarity opposite to that of the signals to be quantified; (c) fine counting means for counting a period proportional to discharge of the accumulated residual charge and calculate from this a low order value quantization of the signals; (d) said quantified charge generator and quantization capacitor, selectably switchable between the first reference voltage source and a function generator voltage source of polarity opposite to that of the signal to be quantified; (e) rough counting means for counting the number of injected quantified charges and calculate from these a high value quantization of the signals; (f) a triggered oscillator and control logic sequencer for alternatively coupling said quantization capacitor with the charge integrator input; (g) a sequencer for alternatively coupling the reference voltage source and function generator to said quantization capacitor; and (h) a means to selectively measure and discharge a residual electric charge, including said charge generator and appropriately coupled to said quantization capacitor.
Claim 9
Dependent Claim
68 words
A converter as recited in claim 6, wherein the accumulation means comprise a plurality of capacitors, with a first capacitor connected initially to the input of an operational amplifier with integration means, and secondly to the output of said amplifier, and a second capacitor with a capacity greater than that of the first capacitor connected firstly to a constant potential and secondly to the output of said amplifier.
Claim 10
Dependent Claim
38 words
A converter as recited in claim 6, wherein the rough counting means and fine counting means comprise a common counter containing a first and second separate input in order to receive the low and high order value quantizations.
Claim 11
Dependent Claim
38 words
A converter as recited in claim 7, wherein the rough counting means and fine counting means comprise a common counter containing a first and second separate input in order to receive the low and high order value quantizations.
Claim 12
Dependent Claim
70 words
A converter as recited in claim 6, wherein the accumulation means comprise a plurality of capacitors, with a first capacitor connected initially to the input of an operation amplifier with integration means, and secondly to the output of said amplifier, and a second capacitor with a capacity greater than that of the first capacitor connected firstly to the input of the amplifier and secondly to the output of said amplifier.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-10-22 | 1994-04-23 | 1994-10-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-10-22 | 1998-04-23 | 1998-10-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-10-22 | 2002-04-23 | 2002-10-23 | $7700.00 | Window Closed / Lapsed |