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US4528549A Expired / Lapsed US ⏱️ 0.0 years remaining

Bipolar digitizer having compression capability

Assignee: United States Department of the Air Force
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Filing: 1983-01-27
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Granted: 1985-07-09
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Expires: 2003-01-27
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Abstract

Abstract A bipolar digitizer (A/D converter) is disclosed which uses a single comparator circuit for initially determining the polarity of a sampled input signal and for thereafter comparing the absolute magnitude of the signal to an applied ramp voltage. The time required for the ramp voltage to exceed the magnitude of the sampled input signal is converted into a digital waveform representative of the magnitude of the sampled input signal. Resistive means are selectively connected in shunt with a signal storage capacitor to achieve bipolar signal compression and increased dynamic range.

Inventors

  • 👤 James E. Simpson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 10:03
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/50; H03M1/56

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 246 words
Signal processing apparatus comprising: sample and hold means for sampling and temporarily storing discrete voltage segments of an applied analog signal waveform, said sample and hold means including a capacitor for temporarily storing said discrete voltage segments, ramp generator means for providing a linearly-rising ramp voltage waveform, signal inversion means connected to the output of said sample and hold means, single comparator means coupled to said sample and hold means and to said ramp generator means for initially determining the polarity of a stored voltage segment of said analog signal waveform and for thereafter providing an output indication when the magnitude of said ramp voltage waveform exceeds the absolute magnitude of said stored voltage segment, first switch means for initially connecting the output of said sample and hold means to a first input terminal of said comparator means, and for thereafter connecting the output of said signal inversion means to said first input terminal when the said stored voltage segment has a negative value, second switch means for initially connecting a ground reference potential to a second input terminal of said comparator means to determine the polarity of said stored voltage segment and for thereafter coupling said ramp voltage waveform to said second input terminal of said comparator means, and digital counting means responsive to the output of said comparator means for providing a digital pulse waveform representative of the time required for said ramp voltage to exceed the absolute magnitude of said stored voltage segment.
Claim 2
Dependent Claim 246 words
Signal processing apparatus comprising: sample and hold means for sampling and temporarily storing discrete voltage segments of an applied analog signal waveform, said sample and hold means including a capacitor for temporarily storing said discrete voltage segments, ramp generator means for providing a linearly-rising ramp voltage waveform, signal inversion means connected to the output of said sample and hold means, single comparator means coupled to said sample and hold means and to said ramp generator means for initially determining the polarity of a stored voltage segment of said analog signal waveform and for thereafter providing an output indication when the magnitude of said ramp voltage waveform exceeds the absolute magnitude of said stored voltage segment, first switch means for initially connecting the output of said sample and hold means to a first input terminal of said comparator means, and for thereafter connecting the output of said signal inversion means to said first input terminal when the said stored voltage segment has a negative value, second switch means for initially connecting a ground reference potential to a second input terminal of said comparator means to determine the polarity of said stored voltage segment and for thereafter coupling said ramp voltage waveform to said second input terminal of said comparator means, and digital counting means responsive to the output of said comparator means for providing a digital pulse waveform representative of the time required for said ramp voltage to exceed the absolute magnitude of said stored voltage segment.
Claim 3
Dependent Claim 25 words
The apparatus of claim 1 and further comprising: impedance means shunting said capacitor whereby the magnitude of said stored voltage segment diminishes exponentially with time.
Claim 4
Dependent Claim 12 words
The apparatus of claim 2 wherein said impedance means is a resistor.
Claim 5
Dependent Claim 39 words
The apparatus of claim 1 and further comprising: means for establishing and maintaining a maximum count in said digital counting means when the absolute value of said stored voltage segment exceeds the maximum value of said ramp voltage waveform.
Claim 6
Dependent Claim 16 words
The apparatus of claim 4 and further comprising: resistive means connected in shunt with said capacitor.
Claim 7
Dependent Claim 124 words
A bipolar analog to digital comparator comprising: a sample and hold circuit including a signal storage capacitor, a ramp voltage generator, a comparator having first and second inputs and an output, a signal inverter connected to the output of said sample and hold circuit, a first switch selectively connecting either the output of said sample and hold circuit or the output of said signal inverter to the first input of said comparator, a second switch selectively connecting either a ground reference potential or said ramp voltage generator to the second input of said comparator. a sequencer circuit controlling the operation of said first and said second switch and receiving output signals from said comparator, and a digital up/down counter coupled to said sequencer circuit.
Claim 8
Dependent Claim 124 words
A bipolar analog to digital comparator comprising: a sample and hold circuit including a signal storage capacitor, a ramp voltage generator, a comparator having first and second inputs and an output, a signal inverter connected to the output of said sample and hold circuit, a first switch selectively connecting either the output of said sample and hold circuit or the output of said signal inverter to the first input of said comparator, a second switch selectively connecting either a ground reference potential or said ramp voltage generator to the second input of said comparator. a sequencer circuit controlling the operation of said first and said second switch and receiving output signals from said comparator, and a digital up/down counter coupled to said sequencer circuit.
Claim 9
Dependent Claim 18 words
The apparatus of claim 6 and further comprising: a resistor connected in shunt with said signal storage capacitor.
Claim 10
Dependent Claim 25 words
The apparatus of claim 7 and further comprising: a jamming circuit connected to said digital up/down counter for establishing and maintaining a full count therein.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-07-08 1989-01-07 1989-07-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-07-08 1993-01-07 1993-07-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-07-08 1997-01-07 1997-07-09 $7700.00 Window Closed / Lapsed

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