Bipolar transistor fabrication utilizing CMOS techniques

Claim 1

A method of fabricating a bipolar transistor, comprising the steps of: forming a semiconductor well of a first conductivity type at the face of a semiconductor body; forming a semiconductor base region of a second conductivity type in said semiconductor well; forming a polycrystalline silicon emitter structure of said first conductivity type in contact with said semiconductor base region, said emitter structure having sidewalls; forming a single layer of insulation on said polycrystalline silicon emitter structure and selectively removing said insulation without a mask from planar surfaces to concurrently form single layer sidewall insulation on said sidewalls of said polycrystalline silicon emitter structure; forming a semiconductor collector region of a first conductivity type in said well contiguously self aligned with respect to said insulation for said emitter structure; forming a semiconductor extrinsic base region of said second conductivity type in said well and self aligned with respect to said insulation for said emitter structure, and extrinsic base region contiguous with said semiconductor base region; and providing an impurity of said first conductivity type into said base regions to thereby form a semiconductor emitter region of said first conductivity type.

Claim 2

A method of fabricating a bipolar transistor, comprising the steps of: forming a semiconductor well of a first conductivity type at the face of a semiconductor body; forming a semiconductor base region of a second conductivity type in said semiconductor well; forming a polycrystalline silicon emitter structure of said first conductivity type in contact with said semiconductor base region, said emitter structure having sidewalls; forming a single layer of insulation on said polycrystalline silicon emitter structure and selectively removing said insulation without a mask from planar surfaces to concurrently form single layer sidewall insulation on said sidewalls of said polycrystalline silicon emitter structure; forming a semiconductor collector region of a first conductivity type in said well contiguously self aligned with respect to said insulation for said emitter structure; forming a semiconductor extrinsic base region of said second conductivity type in said well and self aligned with respect to said insulation for said emitter structure, and extrinsic base region contiguous with said semiconductor base region; and providing an impurity of said first conductivity type into said base regions to thereby form a semiconductor emitter region of said first conductivity type.

Claim 11

A method of forming self-aligned semiconductor regions in a bipolar transistor, comprising: forming a semiconductor base region in the face of a substrate; forming a doped polycrystalline silicon layer in contact with said base region at a location to define an emitter region; forming said polycrystalline silicon with an edge extending laterally beyond said emitter region; diffusing the dopant of said polycrystalline silicon into said base region to form said emitter region; and forming a single layer of insulator on said polycrystalline silicon layer and selectively removing said insulator without a mask from planar surfaces to concurrently form single layer sidewall insulator on said edge of said polycrystalline silicon; and forming said collector contiguously aligned with said insulator.

Claim 12

A method of forming self-aligned semiconductor regions in a bipolar transistor, comprising: forming a semiconductor base region in the face of a substrate; forming a doped polycrystalline silicon layer in contact with said base region at a location to define an emitter region; forming said polycrystalline silicon with an edge extending laterally beyond said emitter region; diffusing the dopant of said polycrystalline silicon into said base region to form said emitter region; and forming a single layer of insulator on said polycrystalline silicon layer and selectively removing said insulator without a mask from planar surfaces to concurrently form single layer sidewall insulator on said edge of said polycrystalline silicon; and forming said collector contiguously aligned with said insulator.

Claim 16

A method of forming emitter and gate structures on a semiconductor body, comprising the steps of: forming a semiconductor base region in a face of said semiconductor body; forming an oxide layer over said semiconductor body; depositing a first polysilicon layer over said oxide layer; forming an opening in said oxide layer and said first polysilicon layer to expose a portion of said base region; and depositing a second polysilicon layer directly over and contiguous with substantially all of said first polysilicon layer and patterning, to concurrently define separate Bipolar emitter and MOSFET gate structures, said structures including sidewalls.

Claim 17

A method of forming emitter and gate structures on a semiconductor body, comprising the steps of: forming a semiconductor base region in a face of said semiconductor body; forming an oxide layer over said semiconductor body; depositing a first polysilicon layer over said oxide layer; forming an opening in said oxide layer and said first polysilicon layer to expose a portion of said base region; and depositing a second polysilicon layer directly over and contiguous with substantially all of said first polysilicon layer and patterning, to concurrently define separate Bipolar emitter and MOSFET gate structures, said structures including sidewalls.

Claim 23

A method of fabricating bipolar transistor structures comprising the steps of: providing a semiconductor body; forming an oxide layer over said semiconductor body; forming an opening in said oxide layer to expose an portion of said semiconductor body; forming a bipolar semiconductor structure on said semiconductor body portion exposed by said opening in, said bipolar semiconductor structure having sidewalls extending partially onto said oxide layer such that oxide is disposed between said sidewalls and said semiconductor body; forming a single layer of insulation on said emitter structure and selectively removing said insulation without a mask from planar surfaces to concurrently form single layer sidewall insulator on said sidewalls of said structure; forming a bipolar semiconductor region self-aligned with respect to said sidewall insulation for said bipolar semiconductor structure, said sidewall insulation and said oxide layer disposed between said sidewalls and said semiconductor body combining to separate said bipolar semiconductor structure and said bipolar semiconductor region.

Claim 24

A method of fabricating bipolar transistor structures comprising the steps of: providing a semiconductor body; forming an oxide layer over said semiconductor body; forming an opening in said oxide layer to expose an portion of said semiconductor body; forming a bipolar semiconductor structure on said semiconductor body portion exposed by said opening in, said bipolar semiconductor structure having sidewalls extending partially onto said oxide layer such that oxide is disposed between said sidewalls and said semiconductor body; forming a single layer of insulation on said emitter structure and selectively removing said insulation without a mask from planar surfaces to concurrently form single layer sidewall insulator on said sidewalls of said structure; forming a bipolar semiconductor region self-aligned with respect to said sidewall insulation for said bipolar semiconductor structure, said sidewall insulation and said oxide layer disposed between said sidewalls and said semiconductor body combining to separate said bipolar semiconductor structure and said bipolar semiconductor region.