US4958342A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Adaptive digital network interface
Assignee: ARISTACOM INTERNATIONAL Inc
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Filing: 1989-11-09
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Granted: 1990-09-18
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Expires: 2009-11-09
Abstract
Abstract A multiplexing data communication system (10) provides for communication between a plurality of microcomputer terminals (12) with a host computer (30). Communications from the microcomputer (12) are multiplexed over a T1 line (26) between two DMI interfaces (22 and 24). The DMI interface (24) includes an adaptive digital network interface (62) which processes the multiplex data in a serial manner allowing for flexibility in framing the data and processing protocol information. Program control in the adaptive digital network interface (62) is performed in part by the status of three counters (266, 268 and 272) and the bit present at the output of the fifo memory (112) allowing for increased processing speeds. Furthermore, processing speed is enhanced through use of an instruction set allowing simultaneous strobing and enabling of the elements of the adaptive digital network interface (62).
Inventors
- 👤 Stephen J. Williams
- 👤 Elden D. Traster
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 01:26
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/50; H04L12/52; H04L12/525
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
115 words
A method of serially transmitting data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising the steps of: determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; transmitting data bits associated with said first channel during one or more of said time intervals associated with said first channel; generating a non-data bit in response and subsequent to a predetermined pattern of transmitted data bits; transmitting said non-data bit prior to transmitting a next data bit; and transmitting data associated with said second channel after transmitting a predetermined number of data and non-data bits associated with said first channel.
Claim 2
Independent Claim
115 words
A method of serially transmitting data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising the steps of: determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; transmitting data bits associated with said first channel during one or more of said time intervals associated with said first channel; generating a non-data bit in response and subsequent to a predetermined pattern of transmitted data bits; transmitting said non-data bit prior to transmitting a next data bit; and transmitting data associated with said second channel after transmitting a predetermined number of data and non-data bits associated with said first channel.
Claim 3
Dependent Claim
26 words
The method of claim 1 wherein said data and non-data bits are transmitted into a first-in, first-out memory prior to transmission on the digital communication circuit.
Claim 4
Dependent Claim
48 words
The method of claim 1 and further comprising the steps of: accessing a first data unit comprising a predetermined number of data bits associated with said first channel; and storing the untransmitted data bits of said first data unit prior to transmitting data associated with said second channel.
Claim 5
Dependent Claim
32 words
The method of claim 3 and further comprising the step of storing the number of data bits of said first data unit transmitted prior to transmitting data associated with said second channel.
Claim 6
Dependent Claim
35 words
The method of claim 3 and further comprising the step of storing the number of data bits of said first data unit which were not transmitted prior to transmitting data associated with said second channel.
Claim 7
Dependent Claim
29 words
The method of claim 1 wherein said predetermined pattern of data bits occurs when a predetermined number of consecutive data bits having the same predetermined binary value are transmitted.
Claim 8
Dependent Claim
20 words
The method of claim 1 wherein the length of said time intervals associated with said first channel may be varied.
Claim 9
Independent Claim
134 words
An apparatus for serially transmitting data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising: means for determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; means for transmitting data bits over a first channel during one or more of said predetermined time intervals associated with said first channel; means for generating a non-data bit in response to a predetermined pattern of transmitted data bits; means for transmitting said non-data bit prior to transmitting a next data bit; and means for detecting the number of data and non-data bits which have been transmitted on said first channel, said apparatus transmitted data associated with a second channel after detection of a predetermined number of data and non-data bits.
Claim 10
Independent Claim
134 words
An apparatus for serially transmitting data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising: means for determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; means for transmitting data bits over a first channel during one or more of said predetermined time intervals associated with said first channel; means for generating a non-data bit in response to a predetermined pattern of transmitted data bits; means for transmitting said non-data bit prior to transmitting a next data bit; and means for detecting the number of data and non-data bits which have been transmitted on said first channel, said apparatus transmitted data associated with a second channel after detection of a predetermined number of data and non-data bits.
Claim 11
Dependent Claim
27 words
The apparatus of claim 8 and further comprising a first-in, first-out memory, said first-in, first-out memory operable to receive data from said means for transmitting data bits.
Claim 12
Dependent Claim
48 words
The apparatus of claim 8 and further comprising: means for accessing a data unit comprising a predetermined number of data bits associated with said first channel; a memory for storing the untransmitted data bits of said first data unit prior to transmitting data associated with said second channel.
Claim 13
Dependent Claim
36 words
The apparatus of claim 10 wherein said memory for storing the untransmitted data bits also stores the number of data bits of said first data unit transmitted prior to transmitting data associated with said second channel.
Claim 14
Dependent Claim
39 words
The apparatus of claim 10 wherein said memory for storing the untransmitted data bits also stores the number of data bits of said first data unit which were not transmitted prior to transmitting data associated with said second channel.
Claim 15
Dependent Claim
29 words
The apparatus of claim 8 wherein said predetermined pattern of data bits occurs when a predetermined number of consecutive data bits having the same predetermined binary value are transmitted.
Claim 16
Dependent Claim
25 words
The apparatus of claim 8 wherein the bandwidth of said first channel may be changed by varying said predetermined number of data and non-data bits.
Claim 17
Independent Claim
120 words
A method of serially receiving data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising the steps of: determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; receiving data bits during one or more of said predetermined time intervals associated with said first channel; detecting a non-data bit in response and subsequent to a predetermined patter of received data bits; removing said non-data bit from a data stream of received data bits prior to receiving a next data bit; and receiving data associated with a second channel after a predetermined number of data and non-data bits have been received on said first channel.
Claim 18
Independent Claim
120 words
A method of serially receiving data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising the steps of: determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; receiving data bits during one or more of said predetermined time intervals associated with said first channel; detecting a non-data bit in response and subsequent to a predetermined patter of received data bits; removing said non-data bit from a data stream of received data bits prior to receiving a next data bit; and receiving data associated with a second channel after a predetermined number of data and non-data bits have been received on said first channel.
Claim 19
Dependent Claim
29 words
The method of claim 15 wherein said data and non-data bits are received into a first-in, first-out memory prior to grouping said data bits into a first data unit.
Claim 20
Dependent Claim
40 words
The method of claim 15 and further comprising the step of storing said received data bits of a first data unit prior to receiving data associated with said second channel, said first data unit having a predetermined number of bits.
Claim 21
Dependent Claim
32 words
The method of claim 17 and further comprising the step of storing the number of data bits of said first data unit received prior to receiving data associated with said second channel.
Claim 22
Dependent Claim
35 words
The method of claim 17 and further comprising the step of storing the number of data bits of said first data unit which were not received prior to receiving data associated with said second channel.
Claim 23
Dependent Claim
29 words
The method of claim 15 wherein said predetermined pattern of data bits occurs when a predetermined number of consecutive data bits having the same predetermined binary value are received.
Claim 24
Dependent Claim
25 words
The method of claim 15 wherein the bandwidth of said first channel may be changed by varying said predetermined number of data and non-data bits.
Claim 25
Independent Claim
117 words
An apparatus for serially receiving data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising: means for determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; means for receiving bits over a first channel during one or more of said predetermined time intervals associated with said first channel; means for detecting a non-data bit in response to a predetermined pattern of received bits, said non-data bit detected prior to receiving the next data bit; and means for receiving data associated with a second channel after a predetermined number of data and non-data bits have been received on said first channel.
Claim 26
Independent Claim
117 words
An apparatus for serially receiving data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising: means for determining one or more time intervals associated with a first channel and one or more time intervals associated with a second channel; means for receiving bits over a first channel during one or more of said predetermined time intervals associated with said first channel; means for detecting a non-data bit in response to a predetermined pattern of received bits, said non-data bit detected prior to receiving the next data bit; and means for receiving data associated with a second channel after a predetermined number of data and non-data bits have been received on said first channel.
Claim 27
Dependent Claim
40 words
The apparatus of claim 22 and further comprising a first-in, first-out memory, said first-in, first-out memory operable to input buts from said digital telecommunication circuit, and said means for receiving bits operable to receive bits from said first-in, first-out memory.
Claim 28
Dependent Claim
42 words
The apparatus of claim 22 and further comprising means for storing the received data bits of a data unit associated with first channel prior to receiving data associated with said second channel, said data unit having a predetermined number of data bits.
Claim 29
Independent Claim
198 words
A method of serially transmitting and receiving data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising the steps of: determining one or more time intervals associated with a first transmitting channel and one or more time intervals associated with a first receiving channel; transmitting data bits associated with said first transmitting channel during one or more of said first transmitting time intervals; generating a non-data bit in response and subsequent to transmitting a predetermined patter of data bits; transmitting said non-data bit prior to transmitting a next data bit; transmitting data bits associated with a second transmitting channel after transmitting a predetermined number of data and non-data bits associated with said first transmitting channel; receiving data bits associated with said first receiving channel during one or more of said first receiving time intervals; detecting a non-data bit in response and subsequent to receiving a predetermined pattern of data bits; removing said non-data bit from a data stream of received data bits prior to receiving a next data bit; and receiving data associated with a second receiving channel after receiving a predetermined number of data and non-data bits associated with said first receiving channel.
Claim 30
Independent Claim
198 words
A method of serially transmitting and receiving data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising the steps of: determining one or more time intervals associated with a first transmitting channel and one or more time intervals associated with a first receiving channel; transmitting data bits associated with said first transmitting channel during one or more of said first transmitting time intervals; generating a non-data bit in response and subsequent to transmitting a predetermined patter of data bits; transmitting said non-data bit prior to transmitting a next data bit; transmitting data bits associated with a second transmitting channel after transmitting a predetermined number of data and non-data bits associated with said first transmitting channel; receiving data bits associated with said first receiving channel during one or more of said first receiving time intervals; detecting a non-data bit in response and subsequent to receiving a predetermined pattern of data bits; removing said non-data bit from a data stream of received data bits prior to receiving a next data bit; and receiving data associated with a second receiving channel after receiving a predetermined number of data and non-data bits associated with said first receiving channel.
Claim 31
Independent Claim
213 words
An apparatus for serially transmitting and receive data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising: means for determining one or more time intervals associated with a first transmitting channel and one or more time intervals associated with a first receiving channel; means for transmitting data bits associated with said first transmitting channel during one or more of said first transmitting time intervals; means for generating a non-data bit in response and subsequent to transmitting a predetermined pattern of data bits; means for transmitting said non-data bit prior to transmitting a next data bit; means for transmitting data bits associated with a second transmitting channel after transmitting a predetermined number of data and non-data bits associated with said first transmitted channel; means for receiving data bits associated with said first receiving channel during one or more of said first receiving time intervals; means for detecting a non-data bit in response and subsequent to receiving a predetermined patter of data bits; means for removing said non-data bit from a data stream of received data bits prior to receiving a next data bit; and means for receiving data associated with a second receiving channel after receiving a predetermined number of data and non-data bits associated with said first receiving channel.
Claim 32
Independent Claim
213 words
An apparatus for serially transmitting and receive data bits over a plurality of time-multiplexed channels on a digital telecommunication circuit, comprising: means for determining one or more time intervals associated with a first transmitting channel and one or more time intervals associated with a first receiving channel; means for transmitting data bits associated with said first transmitting channel during one or more of said first transmitting time intervals; means for generating a non-data bit in response and subsequent to transmitting a predetermined pattern of data bits; means for transmitting said non-data bit prior to transmitting a next data bit; means for transmitting data bits associated with a second transmitting channel after transmitting a predetermined number of data and non-data bits associated with said first transmitted channel; means for receiving data bits associated with said first receiving channel during one or more of said first receiving time intervals; means for detecting a non-data bit in response and subsequent to receiving a predetermined patter of data bits; means for removing said non-data bit from a data stream of received data bits prior to receiving a next data bit; and means for receiving data associated with a second receiving channel after receiving a predetermined number of data and non-data bits associated with said first receiving channel.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-09-17 | 1994-03-19 | 1994-09-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-09-17 | 1998-03-19 | 1998-09-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-09-17 | 2002-03-19 | 2002-09-18 | $7700.00 | Window Closed / Lapsed |