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US4948741A Expired / Lapsed US ⏱️ 0.0 years remaining

Polysilicon photoconductor for integrated circuits

Assignee: United States Department of Energy
•
Filing: 1989-02-23
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Granted: 1990-08-14
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Expires: 2009-02-23
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Abstract

Abstract A photoconductive element of polycrystalline silicon is provided with intrinsic response time which does not limit overall circuit response. An undoped polycrystalline silicon layer is deposited by LPCVD to a selected thickness on silicon dioxide. The deposited polycrystalline silicon is then annealed at a selected temperature and for a time effective to obtain crystal sizes effective to produce an enhanced current output. The annealed polycrystalline layer is subsequently exposed and damaged by ion implantation to a damage factor effective to obtain a fast photoconductive response.

Inventors

  • 👤 Robert B. Hammond
  • 👤 Douglas R. Bowman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 05:18
CPC Classifications
H; H10; H10F; H10F71/00; H10F71/121; H10F30/00; H10F30/10; H10F39/00; H10F39/10; H10F77/00; H10F77/10; H10F77/16; H10F77/162; H10F77/164; H10F77/1642; Y; Y02; Y02E; Y02E10/00; Y02E10/50; Y02E10/546; Y02E10/547; Y02P; Y02P70/00; Y02P70/50

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 182 words
A process for producing at least one photoconductive element on a bulk silicon substrate comprising: a. forming a silicon dioxide layer on said bulk silicon substrate at each location selected for a photoconductive element; b. depositing at each of said selected locations a layer of polycrystalline silicon, which is insulatively separated from said bulk silicon by said silicon dioxide layer and which serves as a sensing element; c. annealing said deposits of polycrystalline silicon, said anneal being effective to increase output current of a photoconductive element and being carried out at a temperature in the range of from about 1000° to about 1200° C. for a time period of about one hour; d. providing electrically conductive means which contact each of said polycrystalline silicon deposits and which define an optical access gas above each of said polycrystalline silicon deposits; e. subjecting each of said polycrystalline silicon deposits to damage consisting of ion implantation which is effective to adjust response time of the photoconductive element, said response time being proportional to the damage caused to the polycrystalline silicon deposits by said ion implantation.
Claim 2
Dependent Claim 182 words
A process for producing at least one photoconductive element on a bulk silicon substrate comprising: a. forming a silicon dioxide layer on said bulk silicon substrate at each location selected for a photoconductive element; b. depositing at each of said selected locations a layer of polycrystalline silicon, which is insulatively separated from said bulk silicon by said silicon dioxide layer and which serves as a sensing element; c. annealing said deposits of polycrystalline silicon, said anneal being effective to increase output current of a photoconductive element and being carried out at a temperature in the range of from about 1000° to about 1200° C. for a time period of about one hour; d. providing electrically conductive means which contact each of said polycrystalline silicon deposits and which define an optical access gas above each of said polycrystalline silicon deposits; e. subjecting each of said polycrystalline silicon deposits to damage consisting of ion implantation which is effective to adjust response time of the photoconductive element, said response time being proportional to the damage caused to the polycrystalline silicon deposits by said ion implantation.
Claim 3
Dependent Claim 27 words
The process of claim 1 where said deposits of polycrystalline silicon are deposited by an LPCVD process and the thickness of each deposit is about 0.5 micron.
Claim 4
Dependent Claim 13 words
The process of claim 1 where said annealing temperature is about 1.150° C.

References Cited (Backward Citations)

US4155785A Cited
JPS5654058A Cited
US4370175A Cited
US4454526A Cited
US4412900A Cited
JPS59111368A Cited
US4531143A Cited
US4821091A Cited
JPH09574A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-08-13 1994-02-12 1994-08-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-08-13 1998-02-12 1998-08-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-08-13 2002-02-12 2002-08-14 $7700.00 Window Closed / Lapsed

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