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JPS5654058A Expired / Lapsed JP ⏱️ 0.0 years remaining

Integrated circuit

Assignee: NEC Corp
•
Filing: 1979-10-08
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Granted: —
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Expires: 1999-10-08
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Abstract

Abstract PURPOSE:To obtain a temperature coefficient and a sign by forming a monocrystalline semiconductor resitor and polycrystalline semiconductor resistor to be connected to a composite resistor when it is provided on the same semiconductor substrate composing the IC. CONSTITUTION:Two N<+> type implanted region 2 is formed by diffusion on a P type Si substrate 1 and an N type layer 3 is expitaxially grown over the entire surface thereof whereby the layer 3 is separated into 3 islandlike regions by an insulated region containing the region 2 in two regions. Then the islandlike regions are entirely covered with an insulating film 10 and respective openings are etched to form an NPN transistor which has a P type region 5 and an N type region 6 separatly on one region. Then, the P type regions 5 are diffused to the adjacent islandlike region to make the monocrystalline resistor 7 and then, a polycrystalline Si film 11 containing P type or N type impurities of a given concentration is accumulated on the islandlike region adjacent thereto but void of the implanted region to make the polycrystalline resistor 12 to which the resistor 7 is connected in series or in parallel as required. At this point, the selection of a sheet resistance for the resistor 12 will give a desired temperature coefficient.

Inventors

  • 👤 Naotoshi Higashiyama
  • 👤 Takeshi Kuwajima
  • 👤 Koichi Fukaya

Bibliographic Details

Application Number —
Jurisdiction JP
Data Source google_patents
Last Synchronized 2026-10-30 07:41
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/201; H10D84/204; H10D84/209

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