US4942455A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Lead frame for a semiconductor device and a method for manufacturing a semiconductor device using the lead frame
Assignee: Mitsubishi Electric Corp
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Filing: 1987-10-13
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Granted: 1990-07-17
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Expires: 2007-10-13
Abstract
Abstract A lead frame for a semiconductor device and a method for manufacturing the semiconductor device using the frame, the lead frame comprising a dice pad, inner leads, tie bar, outer leads and a thin metal layer of lead which is hard to melt and is easily transformed formed on the surface of that portion of the inner leads, outer leads and the tie bar which is not covered with the sealing resin. In injection molding of a resin material on the lead frame with a semiconductor chip therein, the gap between the lead frame and the mold is filled while the thin metal layer is transformed by the clamping pressure, so that the bur may be prevented from being generated.
Inventors
- 👤 Toshiaki Shinohara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:47
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/016; H10W74/40; H10W70/00; H10W70/40; H10W70/456; H10W70/457; H10W74/10; H10W72/00; H10W72/071; H10W72/075; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/90; H10W72/951; H10W72/952; H10W90/00; H10W90/701; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49121
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
213 words
In a lead frame of a resin sealed type semiconductor device package wherein the lead frame includes a die pad disposed in a central portion thereof with an inner lead, a tie bar and an outer lead formed around the die pad with the tie bar disposed between the inner and outer lead, a chip mounted to the pad and wires connecting the chip to a metal plated surface of the inner lead, and molded resin material covering the chip and at least portions of said metal plated surface of the inner lead and the wires, the improvement comprising said molded resin material having at least a pair of border edges free of burs or bur residues and overlying a surface of the inner lead, said border edges free of burs or bur residues being formed by disposing a thin metal layer on predetermined surfaces of at least the inner lead with edges of said thin metal layer defining said border edges of resin material disposed to cover said chip and metal plated surface portions of the inner lead, with said thin metal layer having a melting temperature greater than the temperature of liquid resin material with said thin metal layer removed from the lead frame subsequent to solidification of the resin material.
Claim 2
Dependent Claim
213 words
In a lead frame of a resin sealed type semiconductor device package wherein the lead frame includes a die pad disposed in a central portion thereof with an inner lead, a tie bar and an outer lead formed around the die pad with the tie bar disposed between the inner and outer lead, a chip mounted to the pad and wires connecting the chip to a metal plated surface of the inner lead, and molded resin material covering the chip and at least portions of said metal plated surface of the inner lead and the wires, the improvement comprising said molded resin material having at least a pair of border edges free of burs or bur residues and overlying a surface of the inner lead, said border edges free of burs or bur residues being formed by disposing a thin metal layer on predetermined surfaces of at least the inner lead with edges of said thin metal layer defining said border edges of resin material disposed to cover said chip and metal plated surface portions of the inner lead, with said thin metal layer having a melting temperature greater than the temperature of liquid resin material with said thin metal layer removed from the lead frame subsequent to solidification of the resin material.
Claim 3
Dependent Claim
20 words
In the lead frame of claim 7, wherein said thin metal layer is a thin substantially pure lead metal layer.
Claim 4
Dependent Claim
23 words
A lead frame for a semiconductor device according to claim 2, wherein the thickness of said thin lead metal layer is about 1μ˜20μ.
References Cited (Backward Citations)
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JPS5332675A
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JPS53145473A
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JPS5779653A
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JPS57202766A
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US4441118A
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JPS60154650A
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JPS6285453A
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-07-16 | 1994-01-15 | 1994-07-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-07-16 | 1998-01-15 | 1998-07-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-07-16 | 2002-01-15 | 2002-07-17 | $7700.00 | Window Closed / Lapsed |