Phase lock recovery apparatus for phase locked loop circuit

Claim 2

A phase lock recovery apparatus for a phase locked loop circuit, the phase locked loop circuit comprising: a synchronous demodulator section having an output for a demodulated signal; a phase comparator having an input for a modulated signal, an input for a phase reference signal, and an output for a phase error signal, said output including a low pass filter; a voltage superposing circuit having a fixed DC voltage source and an input coupled to said phase comparator output; a voltage controlled oscillator coupled to said superposing circuit, the voltage superposing circuit supplying a superposed voltage to said voltage controlled oscillator; and the voltage controlled oscillator having an output which supplies the phase reference signal to the respective phase comparator input; the phase lock recovery apparatus comprising: detection means coupled to the demodulated output of the synchronous demodulator for detecting a phase unlocked state in the phase locked loop circuit; and sweep signal generating means responsive to the detection means for sweeping the frequency of the voltage controlled oscillator to come within the lock range of the frequency of the input signal when the phase unlocked state is detected, wherein the sweep signal generating means includes: voltage generating means for supplying a prescribed sweep voltage to the phase locked loop circuit, the voltage generating means having an operational amplifier, discharging means coupled to the operational amplifier for controlling the sweep voltage, and a field effect transistor connected to the operational amplifier for controlling the discharging means.

Claim 3

The apparatus as claimed in claim 1, wherein the sweep signal generating means includes voltage generating means within the phase locked loop circuit for generating a prescribed sweep voltage.

Claim 4

A phase lock recovery apparatus for a phase locked loop circuit, the phase locked loop circuit comprising: a synchronous demodulator section having an output for a demodulated signal; a phase comparator having an input for a modulated signal, an input for a phase reference signal, and an output for a phase error signal, said output including a low pass filter; a voltage superposing circuit having a fixed DC voltage source and an input coupled to said phase comparator output; a voltage controlled oscillator coupled to said superposing circuit, the voltage superposing circuit supplying a superposed voltage to said voltage controlled oscillator; the voltage controlled oscillator having an output which supplies the phase reference signal to the respective phase comparator input; the phase lock recovery apparatus comprising: error detection means coupled to the demodulated output of the synchronous demodulator for detecting the occurrence of a predetermined number of errors in the input signal of the phase locked loop circuit; and sweep signal generating means responsive to the error detection means for sweeping the frequency of the voltage controlled oscillator to come within the lock range of the frequency of the input signal when the phase unlocked state is detected, wherein the sweep signal generating means includes: voltage generating means for supplying a prescribed sweep voltage to the phase locked loop circuit, the voltage generating means having an operational amplifier, discharging means coupled to the operational amplifier for controlling the sweep voltage, and a field effect transistor connected to the operational amplifier for controlling the discharging means.

Claim 5

A phase lock recovery apparatus for a phase locked loop circuit, the phase locked loop circuit comprising: a synchronous demodulator section having an output for a demodulated signal; a phase comparator having an input for a modulated signal, an input for a phase reference signal, and an output for a phase error signal, said output including a low pass filter; a voltage superposing circuit having a fixed DC voltage source and an input coupled to said phase comparator output; a voltage controlled oscillator coupled to said superposing circuit, the voltage superposing circuit supplying a superposed voltage to said voltage controlled oscillator; the voltage controlled oscillator having an output which supplies the phase reference signal to the respective phase comparator input; the phase lock recovery apparatus comprising: error detection means coupled to the demodulated output of the synchronous demodulator for detecting the occurrence of a predetermined number of errors in the input signal of the phase locked loop circuit; and sweep signal generating means responsive to the error detection means for sweeping the frequency of the voltage controlled oscillator to come within the lock range of the frequency of the input signal when the phase unlocked state is detected, wherein the sweep signal generating means includes: voltage generating means for supplying a prescribed sweep voltage to the phase locked loop circuit, the voltage generating means having an operational amplifier, discharging means coupled to the operational amplifier for controlling the sweep voltage, and a field effect transistor connected to the operational amplifier for controlling the discharging means.

Claim 6

The apparatus as claimed in claim 3 wherein the sweep signal generating means includes voltage generating means within the phase locked loop circuit for generating a prescribed sweep voltage.