US4316154A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Automatic sweep and acquisition circuit for a phase locked loop
Assignee: ITT Inc
•
Filing: 1980-04-07
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Granted: 1982-02-16
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Expires: 2000-04-07
Abstract
Abstract The automatic sweep and acquisition circuit for a phase locked loop includes a first circuit to detect when the error signal into the voltage controlled oscillator of an unlocked phase locked loop drifts to a DC voltage of a predetermined magnitude which represents an out-of-lock condition for the loop and this detected predetermined value is used to start the sweep waveform so as to regain a locked condition. Simultaneously with the start of the sweep waveform a dither tone is introduced into the loop filter which will not be fed back into the loop filter until the loop is locked. This fed back tone is detected and used to turn off or disconnect the sweep voltage and the dither tone.
Inventors
- 👤 Irving A. Krause
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 23:57
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/10; H03L7/12; Y; Y10; Y10S; Y10S331/00; Y10S331/02
Claims Analysis
Total Claims: 42
Claim 1
Independent Claim
89 words
An automatic sweep and acquisition circuit for a phase locked loop comprising: first means coupled to said loop to detect an out-of-lock condition of said loop; second means coupled to said loop and said first means responsive to said out-of-lock condition to inject a sweep voltage and a tone simultaneously into said loop; and third means coupled to said loop and said second means to detect said tone indicating a locked condition of said loop and to disconnect said second means from said loop when said tone is detected.
Claim 2
Dependent Claim
89 words
An automatic sweep and acquisition circuit for a phase locked loop comprising: first means coupled to said loop to detect an out-of-lock condition of said loop; second means coupled to said loop and said first means responsive to said out-of-lock condition to inject a sweep voltage and a tone simultaneously into said loop; and third means coupled to said loop and said second means to detect said tone indicating a locked condition of said loop and to disconnect said second means from said loop when said tone is detected.
Claim 3
Dependent Claim
29 words
A circuit according to claim 1, wherein said first means includes a fourth means to detect when the error signal in said loop achieves a predetermined direct current value.
Claim 4
Dependent Claim
87 words
A circuit according to claim 2, wherein said second means includes a tone generator to provide said tone, a sweep generator to provide said sweep voltage, a summing amplifier coupled to said tone generator and said sweep generator to combine said tone and said sweep voltage, a switch circuit coupled between said summing amplifier and said loop, and a latch circuit coupled between said fourth and third means and said switch circuit to control said switch circuit in response to said out-of-lock condition and said locked condition.
Claim 5
Dependent Claim
14 words
A circuit according to claim 3, wherein said tone generator provides a dither tone.
Claim 6
Dependent Claim
15 words
A circuit according to claim 3, wherein said switch circuit includes a transistor switch. v
Claim 7
Dependent Claim
27 words
A circuit according to claim 3, wherein said third means includes a bandpass filter and a tone detector coupled in between said loop and said latch circuit.
Claim 8
Dependent Claim
13 words
A circuit according to claim 1, wherein said tone is a dither tone.
Claim 9
Dependent Claim
87 words
A circuit according to claim 1, wherein said second means includes a tone generator to provide said tone, a sweep generator to provide said sweep voltage, a summing amplifier coupled to said tone generator and said sweep generator to combine said tone and said sweep voltage, a switch circuit coupled between said summing amplifier and said loop, and a latch circuit coupled between said first and third means and said switch circuit to control said switch circuit in response to said out-of-lock condition and said locked condition.
Claim 10
Dependent Claim
14 words
A circuit according to claim 8, wherein said tone generator provides a dither tone.
Claim 11
Dependent Claim
14 words
A circuit according to claim 8, wherein said switch circuit includes a transistor switch.
Claim 12
Dependent Claim
27 words
A circuit according to claim 8, wherein said third means includes a bandpass filter and a tone detector coupled in between said loop and said latch circuit.
Claim 13
Dependent Claim
28 words
A circuit according to claim 1, wherein said third means includes a bandpass filter and a tone detector coupled in tandem between said loop and said second means.
Claim 14
Dependent Claim
92 words
A circuit according to claim 1, wherein said loop includes a voltage controlled oscillator, a phase detecting means coupled to said oscillator and an input for an intermediate frequency signal to detect a phase error between said intermediate frequency signal and the output signal of said oscillator and produce an error signal, and a loop filter coupled between said detecting means and said oscillator to couple said error signal to said oscillator for control thereof to provide a phase lock between the output signal of said oscillator and said intermediate frequency signal.
Claim 15
Dependent Claim
44 words
A circuit according to claim 13, wherein said first means is coupled to the output of said loop filter, said second means is coupled to the input of said loop filter, and said third means is coupled to the output of said detecting means.
Claim 16
Dependent Claim
34 words
A circuit according to claim 14, wherein said first means includes a fourth means coupled to the output of said loop filter to detect when said error signal achieves a predetermined direct current value.
Claim 17
Dependent Claim
15 words
A circuit according to claim 15, wherein said fourth means includes an operational amplifier circuit.
Claim 18
Dependent Claim
90 words
A circuit according to claim 15, wherein said second means includes a tone generator to provide said tone, a sweep generator to provide said sweep voltage, a summing amplifier coupled to said tone generator and said sweep generator to combine said tone and said sweep voltage, a switch circuit coupled between said summing amplifier and the input of said loop filter, and a latch circuit coupled between first and third means and said switch circuit to control said switch circuit in response to said out-of-lock condition and said locked condition.
Claim 19
Dependent Claim
14 words
A circuit according to claim 17, wherein said tone generator provides a dither tone.
Claim 20
Dependent Claim
29 words
A circuit according to claim 18, wherein each of said tone generator, said sweep generator, said summing amplifier and said latch circuit includes at least one operational amplifier circuit.
Claim 21
Dependent Claim
14 words
A circuit according to claim 19, wherein said switch circuit includes a transistor switch.
Claim 22
Dependent Claim
30 words
A circuit according to claim 17, wherein said third means includes a bandpass filter and a tone detector coupled between the output of said detecting means and said latch circuit.
Claim 23
Dependent Claim
91 words
A circuit according to claim 14, wherein said second means includes a tone generator to provide said tone, a sweep generator to provide said sweep voltage, a summing amplifier coupled to said tone generator and said sweep generator to combine said tone and said sweep voltage, a switch circuit coupled between said summing amplifier and the input of said loop filter, and a latch circuit coupled between said first and third means and said switch circuit to control said switch circuit in response to said out-of-lock condition and said locked condition.
Claim 24
Dependent Claim
14 words
A circuit according to claim 22, wherein said tone generator provides a dither tone.
Claim 25
Dependent Claim
29 words
A circuit according to claim 23, wherein each of said tone generator, said sweep generator, said summing amplifier and said latch circuit includes at least one operational amplifier circuit.
Claim 26
Dependent Claim
14 words
A circuit according to claim 24, wherein said switch circuit includes a transistor switch.
Claim 27
Dependent Claim
30 words
A circuit according to claim 22, wherein said third means includes a bandpass filter and a tone detector coupled between the output of said detecting means and said latch circuit.
Claim 28
Dependent Claim
30 words
A circuit according to claim 14, wherein said third means includes a bandpass filter and a tone detector coupled between the output of said detecting means and said latch circuit.
Claim 29
Dependent Claim
46 words
A circuit according to claim 14, wherein said loop filter includes a first operational amplifier circuit, said first means is coupled to the output of said first operational amplifier circuit, and said second means is coupled to an inverting input of said first operational amplifier circuit.
Claim 30
Dependent Claim
36 words
A circuit according to claim 28, wherein said first means includes a fourth means coupled to the output of said first operational amplifier circuit to detect when said error signal achieves a predetermined direct current value.
Claim 31
Dependent Claim
26 words
A circuit according to claim 29, wherein said fourth means includes a second operational amplifier circuit coupled to the output of said first operational amplifier circuit.
Claim 32
Dependent Claim
94 words
A circuit according to claim 29, wherein said second means includes a tone generator to provide said tone, a sweep generator to provide said sweep voltage, a summing amplifier coupled to said tone generator and said sweep generator to combine said tone and said sweep voltage, a switch circuit coupled between said summing amplifier and said inverting input of said first operational amplifier circuit, and a latch circuit coupled between said fourth and third means and said switch circuit to control said switch circuit in response to said out-of-lock condition and said locked condition.
Claim 33
Dependent Claim
14 words
A circuit according to claim 31, wherein said tone generator provides a dither tone.
Claim 34
Dependent Claim
14 words
A circuit according to claim 31, wherein said switch circuit includes a transistor switch.
Claim 35
Dependent Claim
30 words
A circuit according to claim 31, wherein said third means includes a bandpass filter and a tone detector coupled between the output of said detecting means and said latch circuit.
Claim 36
Dependent Claim
22 words
A circuit according to claim 34, wherein said bandpass filter and said tone detector are included in a second operational amplifier circuit.
Claim 37
Dependent Claim
94 words
A circuit according to claim 28, wherein said second means includes a tone generator to provide said tone, a sweep generator to provide said sweep voltage, a summing amplifier coupled to said tone generator and said sweep generator to combine said tone and said sweep voltage, a switch circuit coupled between said summing amplifier and said inverting input of said first operational amplifier circuit, and a latch circuit coupled between said first and third means and said switch circuit to control said switch circuit in response to said out-of-lock condition and said locked condition.
Claim 38
Dependent Claim
14 words
A circuit according to claim 36, wherein said tone generator provides a dither tone.
Claim 39
Dependent Claim
14 words
A circuit according to claim 37, wherein said switch circuit includes a transistor switch.
Claim 40
Dependent Claim
14 words
A circuit according to claim 36, wherein said switch circuit includes a transistor switch.
Claim 41
Dependent Claim
30 words
A circuit according to claim 36, wherein said third means includes a bandpass filter and a tone detector coupled between the output of said detecting means and said latch circuit.
Claim 42
Dependent Claim
30 words
A circuit according to claim 28, wherein said third means includes a bandpass filter and a tone detector coupled between the output of said detecting means and said latch circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-02-15 | 1985-08-17 | 1986-02-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-02-15 | 1989-08-17 | 1990-02-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-02-15 | 1993-08-17 | 1994-02-16 | $7700.00 | Window Closed / Lapsed |