Signal processor memory management unit with indirect addressing using selectable offsets and modulo values for indexed address calculations

Claim 1

In a digital signal processor having a computation unit and a microsequencer unit coupled by common control and data buses, an improved memory management unit for storing, generating and providing indirectly referenced addresses that, in turn, reference data, said memory management unit being coupled to said common control and data buses to receive indirectly referencing address select control signals provided by said microsequencer unit to transfer data to and from said computation unit, wherein said microsequencer unit selectively provides a signed address index value and said improvement comprises: (a) means for storing said signed address index value; (b) first register means for providing a plurality of selectable address storage locations for storing addresses; (c) second register means for providing a like plurality of selectable storage locations for storing address qualifiers; (d) control means, responsive to said address select control signals, for selecting an address from said first register means and for selecting a respective address qualifier from said second register means; (e) means for generating a new address from said selected address and said respectively selected address qualifier, wherein said respectively selected address qualifier includes a modulo value, comprising means for adding a signed address offset value from said microsequencer to said selected address in generating said new address, said means for adding the signed offset value from said microsequence further comprising address offset means, responsive to said microsequencer unit, for selectively providing said signed address offset value, said address index value or a null offset value to said generating means, and; wherein said generating means performs variable modulo arithmetic in generating said new address using said modulo value, said selected address and the address offset value provided by said address offset means.