US4922131A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Differential voltage threshold detector
Assignee: Beltone Electronics Corp
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Filing: 1988-11-14
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Granted: 1990-05-01
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Expires: 2008-11-14
Abstract
Abstract A differential voltage threshold detector that may be used in a hearing aid circuit. The configuration includes an inherent differential/full wave operation, without the need for additional circuitry. The detector includes a differential transconductance stage, first and second "top" current mirrors (which respond to the transconductance stage), first and second "bottom" current mirrors (which respond to the top current mirrors) and a detector (which responds to the current levels in the mirrors). The detector effectively issues an output signal when the voltage applied to the threshold detector varies by more than a predetermined amount.
Inventors
- 👤 James R. Anderson
- 👤 Richard Brander
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 16:56
CPC Classifications
H; H03; H03G; H03G11/00; H03G11/002; H03F; H03F1/00; H03F1/56; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G5/00; H03G5/02; H03G5/04; H03G5/10; H03G7/00; H03G7/002; H04; H04R; H04R25/00; H04R25/35; H04R25/356; H04R3/00; H04R3/04; H03F2203/00; H03F2203/45; H03F2203/45394; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/0422; H03H11/0433
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
324 words
A differential voltage threshold detector for sensing that the positive and negative values of the difference between voltages on a first input terminal and a second input terminal exceed a substantially predetermined threshold, comprising, in combination: a differential transconductance stage, with first and second differential outputs, for sensing said voltages on said first and second input terminals and responsively issuing first and second output currents; a first top current mirror, interconnected to said first differential output, for sensing said first output current and responsively issuing first and second mirrored currents respectively from first and second mirror outputs, said first and second mirrored currents respectively being in substantially predetermined first and second ratios to said first output current; a second top current mirror, interconnected to said second differential output, for sensing said second output current and responsively issuing third and fourth mirrored currents respectively from third and fourth mirror outputs, said third and fourth mirrored currents respectively being in substantially predetermined third and fourth ratios to said second output current; a first bottom current mirror, interconnected to said second top current mirror, for receiving said fourth mirrored current and for drawing a fifth current from a fifth output said fifth current being in a substantially predetermined fifth ratio to said fourth mirrored current; a second bottom current mirror, interconnected to said first top current mirror, for receiving said second mirrored current and for drawing a sixth current from a sixth output, said sixth current being in a substantially predetermined sixth ratio to said second mirrored current; detector means, interconnected to said top and bottom current mirrors, for issuing an output signal upon sensing that (1) said first mirrored current from said first top current mirror exceeds said fifth current from said first bottom current mirror, and for issuing an output signal upon sensing that (2) said third mirrored current from said second top current mirror exceeds said sixth current from said second bottom current mirror.
Claim 2
Dependent Claim
324 words
A differential voltage threshold detector for sensing that the positive and negative values of the difference between voltages on a first input terminal and a second input terminal exceed a substantially predetermined threshold, comprising, in combination: a differential transconductance stage, with first and second differential outputs, for sensing said voltages on said first and second input terminals and responsively issuing first and second output currents; a first top current mirror, interconnected to said first differential output, for sensing said first output current and responsively issuing first and second mirrored currents respectively from first and second mirror outputs, said first and second mirrored currents respectively being in substantially predetermined first and second ratios to said first output current; a second top current mirror, interconnected to said second differential output, for sensing said second output current and responsively issuing third and fourth mirrored currents respectively from third and fourth mirror outputs, said third and fourth mirrored currents respectively being in substantially predetermined third and fourth ratios to said second output current; a first bottom current mirror, interconnected to said second top current mirror, for receiving said fourth mirrored current and for drawing a fifth current from a fifth output said fifth current being in a substantially predetermined fifth ratio to said fourth mirrored current; a second bottom current mirror, interconnected to said first top current mirror, for receiving said second mirrored current and for drawing a sixth current from a sixth output, said sixth current being in a substantially predetermined sixth ratio to said second mirrored current; detector means, interconnected to said top and bottom current mirrors, for issuing an output signal upon sensing that (1) said first mirrored current from said first top current mirror exceeds said fifth current from said first bottom current mirror, and for issuing an output signal upon sensing that (2) said third mirrored current from said second top current mirror exceeds said sixth current from said second bottom current mirror.
Claim 3
Dependent Claim
42 words
A differential voltage detector as claimed in claim 1 wherein said first and third ratios are substantially one to one, and said second and fourth ratios are substantially two to one; and said fifth and sixth ratios are substantially one to one.
Claim 4
Dependent Claim
88 words
A differential voltage detector as claimed in claim 1 wherein said detector means comprises, in combination: a first transistor having a first input terminal interconnected to both said first mirror output and said fifth output, and having a first output terminal and a first common terminal; and second transistor having a second input terminal interconnected to both said third mirror output and said sixth output, and having second output and common terminals interconnected respectively to said first output and common terminals, said output terminals issuing said output signal.
Claim 5
Dependent Claim
26 words
A differential voltage detector as claimed in claim 3 wherein said input, common and output terminals being respectively, base emitter and collector terminals of said transistors.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-30 | 1993-10-30 | 1994-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-30 | 1997-10-30 | 1998-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-30 | 2001-10-30 | 2002-05-01 | $7700.00 | Window Closed / Lapsed |