Multistep flash analog to digital converter with voltage estimator

Claim 1

An N bit multistep flash analog to digital converter comprising: an input terminal for receiving an analog input signal; an output bus for providing an N bit digital word representing the magnitude of said input signal; an analog signal estimator having an input lead coupled to said input terminal and an output bus for providing an M bit estimator word representing an approximate magnitude of said analog input signal; a P bit flash converter having an input lead for receiving an analog signal to be converted and an output bus for providing a P bit digital word representing the magnitude of said analog signal applied to said input lead of said flash converter; means for providing a residual analog signal equal to said input analog signal minus the analog equivalent of said M bit estimator word and a P bit digital word from a first cycle of said P bit flash converter; switch means for coupling said input lead of said P bit flash converter to receive said analog input signal during a first cycle of said P bit flash converter and to receive said residual analog signal during a second cycle of said P bit flash converter; and means for combining said M bit estimator word and said P bit digital words resulting from said first and second cycles of said P bit flash converter in order to provide said N bit digital output word.