US4916508A
Expired / Lapsed
US
⏱️ 0.0 years remaining
CMOS type integrated circuit and a method of producing same
Assignee: Mitsubishi Electric Corp
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Filing: 1987-01-07
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Granted: 1990-04-10
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Expires: 2007-01-07
Abstract
Abstract A MOS type integrated circuit transistor includes: a channel region comprising a monocrystalline epitaxial layer; and a source/drain region of said transistor and a wiring region of a diffusion layer formed of a polycrystalline silicon layer grown on an embedded insulating film.
Inventors
- 👤 Katsuhiro Tsukamoto
- 👤 Tatsuhiko Ikeda
- 👤 Tatsuo Okamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 18:52
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D62/113; H10D62/115; H10D62/116; H10D62/80; H10D62/83; H10D64/00; H10D64/60; H10D64/62; H10D64/66; H10D64/661; H10D64/662; H10D64/663; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/017; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
114 words
A MOS type integrated circuit, comprising: an embedded insulator film formed on a semiconductor substrate to expose a portion of surface of said semiconductor substrate, a first conductivity type monocrystalline silicon layer produced on said portion of said semiconductor substrate, to constitute a channel region of a MOS transistor; polycrystalline silicon layers formed on said embedded insulator film adjacent said monocrystalline silicon layer at each side thereof; second conductivity type source and drain regions of said MOS transistor formed in said polycrystalline silicon layers; a gate electrode of said MOS transistor formed on said monocrystalline channel region via a gate insulator; and high melting point metal silicide layers formed on said source/drain regions, respectively.
Claim 2
Dependent Claim
114 words
A MOS type integrated circuit, comprising: an embedded insulator film formed on a semiconductor substrate to expose a portion of surface of said semiconductor substrate, a first conductivity type monocrystalline silicon layer produced on said portion of said semiconductor substrate, to constitute a channel region of a MOS transistor; polycrystalline silicon layers formed on said embedded insulator film adjacent said monocrystalline silicon layer at each side thereof; second conductivity type source and drain regions of said MOS transistor formed in said polycrystalline silicon layers; a gate electrode of said MOS transistor formed on said monocrystalline channel region via a gate insulator; and high melting point metal silicide layers formed on said source/drain regions, respectively.
Claim 3
Dependent Claim
32 words
A MOS type integrated circuit as defined in claim 1, further comprising a high melting point metal or a high melting point metal silicide provided on the surface of said source/drain regions.
Claim 4
Dependent Claim
22 words
A MOS type integrated circuit as defined in claim 1, wherein molybdenum or tungsten is used as said high melting point metal.
Claim 5
Dependent Claim
31 words
A MOS type integrated circuit as defined in claim 1, wherein titanium silicide, tungsten silicide, molybdenum silicide, tantalum silicide, or zirconium silicide is used as said high melting pint metal silicide.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-09 | 1993-10-09 | 1994-04-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-09 | 1997-10-09 | 1998-04-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-09 | 2001-10-09 | 2002-04-10 | $7700.00 | Window Closed / Lapsed |