US4914580A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Communication system having interrupts with dynamically adjusted priority levels
Assignee: Avaya Technology LLC
•
Filing: 1987-10-26
•
Granted: 1990-04-03
•
Expires: 2007-10-26
Abstract
Abstract A communication system includes a processor, memory circuits and a plurality of interfaces for interfacing to data devices. The processor services the interfaces using an interrupt bus including unidirectional inbound and outbound buses. The inbound bus includes one lead for each interface, with each lead having a fixed priority level assigned by the processor. Each interface has access to all leads of the inbound bus. The processor sends commands over the outbound bus to dynamically control the connection of an interface to a lead of the inbound bus.
Inventors
- 👤 Craig W. Jensen
- 👤 Frederick R. Keller
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 01:29
CPC Classifications
G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/24; G06F13/26
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
167 words
A communication system including a processor connected over an interrupt bus to a plurality of interfaces, wherein said bus comprises a processor outbound bus for signaling a command from said processor to an addressed interface; a processor inbound bus having a plurality of leads including one lead for each interface of said plurality of interfaces, each lead assigned a fixed priority level by said processor for signaling an interrupt from an interface to said processor; said processor comprising means for sending over said outbound bus a command to each interface specifying a connection between each interface and a different lead of said inbound bus; and each interface comprising switching means for connecting to anyone of said plurality of leads of said inbound bus, means for detecting on said outbound bus a received command addressed to said each interface, and means responsive to said received command for enabling said switching means to establish a connection to a lead of said inbound bus as specified in said received command.
Claim 2
Dependent Claim
167 words
A communication system including a processor connected over an interrupt bus to a plurality of interfaces, wherein said bus comprises a processor outbound bus for signaling a command from said processor to an addressed interface; a processor inbound bus having a plurality of leads including one lead for each interface of said plurality of interfaces, each lead assigned a fixed priority level by said processor for signaling an interrupt from an interface to said processor; said processor comprising means for sending over said outbound bus a command to each interface specifying a connection between each interface and a different lead of said inbound bus; and each interface comprising switching means for connecting to anyone of said plurality of leads of said inbound bus, means for detecting on said outbound bus a received command addressed to said each interface, and means responsive to said received command for enabling said switching means to establish a connection to a lead of said inbound bus as specified in said received command.
Claim 3
Dependent Claim
81 words
The communication system of claim 1 further including a readable and writable memory connected over a third bus to said processor and connected over a fourth bus to said plurality of interfaces, said processor and said plurality of interfaces communicating data therebetween using said third bus said memory and said fourth bus and said command is used to signal each interface to read said memory to obtain data specifying the lead of said inbound bus to which each interface should connect.
Claim 4
Dependent Claim
53 words
The communication system of claim 1 wherein said processor sending means sends an initialization command specifying an initialization procedure to be performed at each interface including a predetermined connection assignment to a lead of said inbound bus, and each interface includes means responsive to said received initialization command for performing said initialization procedure.
Claim 5
Dependent Claim
44 words
The communication system of claim 1 wherein said outbound bus includes an address bus over which the processor sends an address for selecting an interface to receive a command and a control bus over which the processor sends a command to the selected interface.
Claim 6
Dependent Claim
29 words
The communication system of claim 1 wherein said processor sending means sends a disconnect command to a selected interface specifying that said selected interface disconnect from the inbound bus.
Claim 7
Dependent Claim
28 words
The communication system of claim 1 wherein said command is a connect command which specifies that a selected interface connect to a certain lead of said inbound bus.
Claim 8
Dependent Claim
148 words
An interface for enabling communication between a data device and a processor of a communication system, said interface connected to said processor using a data bus and an interrupt bus, said interface arranged to receive commands for said processor and said data bus, and said interface comprising switching means for connecting to each lead of a multilead inbound bus of said interrupt bus wherein each lead of said inbound bus signals a different priority interrupt level from said interface to said processor, means for detecting on an outbound bus of said interrupt bus a received command from said processor addressed to said interface, and means responsive to said received command for enabling said switchably connecting means to connect to a lead of said multilead inbound bus as specified by said received command, said lead establishing an interrupt priority level for data communications between said interface and said processor.
Claim 9
Dependent Claim
148 words
An interface for enabling communication between a data device and a processor of a communication system, said interface connected to said processor using a data bus and an interrupt bus, said interface arranged to receive commands for said processor and said data bus, and said interface comprising switching means for connecting to each lead of a multilead inbound bus of said interrupt bus wherein each lead of said inbound bus signals a different priority interrupt level from said interface to said processor, means for detecting on an outbound bus of said interrupt bus a received command from said processor addressed to said interface, and means responsive to said received command for enabling said switchably connecting means to connect to a lead of said multilead inbound bus as specified by said received command, said lead establishing an interrupt priority level for data communications between said interface and said processor.
Claim 10
Dependent Claim
26 words
The interface of claim 7 wherein said command signals said interface to obtain data via said data bus for specifying the connection to said inbound bus.
Claim 11
Dependent Claim
46 words
The interface of claim 7 wherein said detecting means receives an address over an address bus of said outbound bus for selecting said interface and receives a command over a control bus of said outbound bus for specifying an operation to be performed at said interface.
Claim 12
Independent Claim
140 words
A method of operating a communication system including a processor connected over an interrupt bus to a plurality of interfaces, the method comprising the steps of: at said processor specifying an interrupt priority level of each interface of said plurality of interfaces by sending over an outbound bus of said interrupt bus a command to each interface specifying a connection between each interface and a different lead of a multilead inbound bus of said interrupt bus, each lead having a priority level assigned by said processor for data communications between each interface and said processor; and receiving from each interface an interrupt over said different lead of said inbound bus; and at each interface detecting on said outbound bus a command addressed to it, and switchably connecting to said different lead of said inbound bus as specified in said command.
Claim 13
Independent Claim
140 words
A method of operating a communication system including a processor connected over an interrupt bus to a plurality of interfaces, the method comprising the steps of: at said processor specifying an interrupt priority level of each interface of said plurality of interfaces by sending over an outbound bus of said interrupt bus a command to each interface specifying a connection between each interface and a different lead of a multilead inbound bus of said interrupt bus, each lead having a priority level assigned by said processor for data communications between each interface and said processor; and receiving from each interface an interrupt over said different lead of said inbound bus; and at each interface detecting on said outbound bus a command addressed to it, and switchably connecting to said different lead of said inbound bus as specified in said command.
References Cited (Backward Citations)
US3676860A
Cited
US3905025A
Cited
US3925766A
Cited
US3815105A
Cited
US4148011A
Cited
US4268904A
Cited
US4320502A
Cited
US4296463A
Cited
US4302808A
Cited
US4373181A
Cited
US4438489A
Cited
US4495569A
Cited
US4493036A
Cited
US4654820A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-02 | 1993-10-02 | 1994-04-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-02 | 1997-10-02 | 1998-04-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-02 | 2001-10-02 | 2002-04-03 | $7700.00 | Window Closed / Lapsed |