A/D converter system with error correction and calibration apparatus and method

Claim 2

An analog to digital converter system comprising: conversion circuitry operative for developing a digital output corresponding to the magnitude of an input analog signal, a calibration port arranged for receiving digital calibration data from an external source, adjustable calibration means comprising adjustable reference voltage means comprised of solid state potentiometer means associated with said circuitry, and adjustment means for adjusting said calibration means in response to data applied to said calibration port, said adjustment means being operable for adjusting said adjustable reference voltage means.

Claim 3

An analog to digital converter system as defined in claim 1 wherein said conversion circuitry comprises input means for receiving said input analog signal, and an A/D converter including said adjustable reference voltage means for developing a series of reference voltage levels in steps of uniform magnitude, and a plurality of comparator means coupled to said input means and said reference voltage means and arranged to compare the magnitude of said input analog signal with said reference voltage levels to develop a number of comparator output signals equal to the number of reference voltage levels which are exceeded by the magnitude of said input analog signal.

Claim 4

An analog to digital converter system as defined in claim 1 wherein said calibration means comprises error correction means including means associated with said conversion circuitry for developing digital data which defines predetermined transitory characteristics of said input analog signal, and memory means for storing calibration data, said error correction means being arranged for applying correction signals to said conversion circuitry in accordance with a comparison of said calibration data and said characteristic-defining data.

Claim 5

An analog to digital converter system as defined in claim 3, said adjustment means being arranged for loading calibration data from said calibration port into said memory means.

Claim 6

An analog to digital converter system as defined in claim 3 wherein said memory means includes an address port and a data port, said error correction means being arranged to apply said characteristic-defining data to said address port for output from said data port of calibration data which corresponds to the applied characteristic-defining data.

Claim 7

An analog to digital converter system as defined in claim 3 wherein said conversion circuitry comprises input means for receiving said input analog signal, and an A/D converter including reference voltage means for developing a series of reference voltage levels in steps of uniform magnitude, said A/D converter further including a plurality of comparator means coupled to said input means and to said reference voltage means and arranged to compare the magnitude of said input analog signal with said reference voltage levels to develop a number of comparator output signals equal to the number of reference voltage levels which are exceeded by the magnitude of said input analog signal, said characteristic-defining data including data defining the number of comparator output signals which are developed.

Claim 8

An analog to digital converter system as defined in claim 3 wherein said calibration means further comprises adjustable reference voltage means associated with said conversion circuitry, said adjustment means being operable for adjusting said adjustable reference voltage means and being arranged for loading calibration data from said calibration port into said memory means.

Claim 9

An analog to digital converter system as defined in claim 3 wherein said correction signals are digital signals, said conversion circuitry including logic means for receiving said digital correction signals in a direction to reduce error in said digital output therefrom.

Claim 10

An analog to digital converter system as defined in claim 8 wherein said conversion circuitry includes a main range A/D converter for producing a digital output corresponding to a first approximation of said input analog signal, a D/A converter coupled to said main range A/D converter for developing a corresponding analog signal, means for producing a difference signal corresponding to a comparison of said analog signal from said D/A converter and said input analog signal, a subrange A/D converter for developing a digital signal corresponding to said difference signal, said logic means being arranged to receive signals derived from said main range and subrange A/D converters and to combine said signals with said digital correction signals.

Claim 11

An analog to digital converter system as defined in claim 9 wherein said logic means includes an adder for receiving and adding said correction signals and said signals derived from said subrange A/D converter, and an output logic circuit for receiving a signal from said adder and a signal derived from said main range A/D circuit.

Claim 12

An analog to digital converter system as defined in claim 3 wherein said conversion circuitry includes comparison means operative with respect to a certain sampling time for comparing the magnitude of said input analog signal with reference voltage levels, and wherein said characteristic-defining data include level-defining data determined by the highest of said reference voltage levels which is exceeded by said input analog signal.

Claim 13

An analog to digital converter system as defined in claim 11 wherein said correction signals are effectively added to the digital output in accordance with a comparison of said calibration data and said level-defining data to obtain a static error correction.

Claim 14

An analog to digital converter system as defined in claim 11 wherein said error correction means includes comparison means which are operative with respect to a presampling time preceding said sampling time of operation of said comparison means of said conversion circuitry and which are operative for comparing the magnitude of said input analog signal at said pre-sampling time with reference voltage levels, and wherein said characteristicdefining data include level-defining data determined by the highest of said reference voltage levels which is exceeded by said input analog signal at said pre-sampling time.

Claim 15

An analog to digital converter system as defined in claim 13 wherein said correction signals are effectively added to the digital output in accordance with a comparison of said calibration data and a comparison of said leveldefining data as determined at said pre-sampling and sampling times to obtain a dynamic error correction.

Claim 16

An analog to digital converter system as defined in claim 13, wherein said memory means includes an address port and a data port, said level-defining data as determined at said pre-sampling and sampling times being applied to said address port for output from said data port of a digital correction signal which corresponds to calibration data stored in said memory means at an address which corresponds to an address defined by the applied presampling and sampling level-defining data.

Claim 17

An analog to digital converter system as defined in claim 5, wherein said address and data ports are connected to said calibration port for simultaneously receiving address and data signals to store data in said memory means which is supplied from calibration source separate from said system.

Claim 18

An analog to digital converter system comprising: conversion circuitry operative for developing a digital output corresponding to the magnitude of an input analog signal, and error correction means associated with said conversion circuitry including means for developing digital data which defines predetermined transitory characteristics of said input analog signal, said error correction means being arranged to apply said characteristic-defining data to said address port for output from said data port of said digital correction signals which correspond to the applied characteristic-defining data, memory means including an address port and a data port for storing calibration data, and means for developing digital correction signals in accordance with a comparison of said calibration data and said characteristic-defining data, said conversion circuitry including logic means for receiving said digital correction signals in a direction to reduce error in said digital output therefrom and said conversion circuitry includes comparison means operative with respect to a certain sampling time for comparing the magnitude of said input analog signal with reference voltage levels, and wherein said characteristic-defining data include level-defining data determined by the highest of said reference voltage levels which is exceeded by said input analog signal.

Claim 19

An analog to digital converter system comprising: conversion circuitry operative for developing a digital output corresponding to the magnitude of an input analog signal, and error correction means associated with said conversion circuitry including means for developing digital data which defines predetermined transitory characteristics of said input analog signal, said error correction means being arranged to apply said characteristic-defining data to said address port for output from said data port of said digital correction signals which correspond to the applied characteristic-defining data, memory means including an address port and a data port for storing calibration data, and means for developing digital correction signals in accordance with a comparison of said calibration data and said characteristic-defining data, said conversion circuitry including logic means for receiving said digital correction signals in a direction to reduce error in said digital output therefrom and said conversion circuitry includes comparison means operative with respect to a certain sampling time for comparing the magnitude of said input analog signal with reference voltage levels, and wherein said characteristic-defining data include level-defining data determined by the highest of said reference voltage levels which is exceeded by said input analog signal.

Claim 20

An analog to digital converter system as defined in claim 17 wherein said digital correction signals are effectively added to the digital output in accordance with a comparison of said calibration data and said level-defining data to obtain a static error correction.

Claim 21

An analog to digital converter system comprising: conversion circuitry operative for developing a digital output corresponding to the magnitude of an input analog signal, and error correction means associated with said conversion circuitry including means for developing digital data which defines predetermined transitory characteristics of said input analog signal, memory means for storing calibration data, and means for developing correction signals in accordance with a comparison of said calibration data and said characteristic-defining data, said conversion circuitry including means for receiving said digital correction signals in a direction to reduce error in said digital output therefrom, said conversion circuitry further including a first A/D converter for developing first digital data corresponding to the amplitude of said input analog signal at a certain sampling time, a second A/D converter for developing second digital data corresponding to the amplitude of said input analog signal at a second sampling time different from said certain sampling time, said characteristic-data including both said first digital data and said second digital data.

Claim 22

An analog to digital converter system comprising: conversion circuitry operative for developing a digital output corresponding to the magnitude of an input analog signal, and error correction means associated with said conversion circuitry including means for developing digital data which defines predetermined transitory characteristics of said input analog signal, memory means for storing calibration data, and means for developing correction signals in accordance with a comparison of said calibration data and said characteristic-defining data, said conversion circuitry including means for receiving said digital correction signals in a direction to reduce error in said digital output therefrom, said conversion circuitry further including a first A/D converter for developing first digital data corresponding to the amplitude of said input analog signal at a certain sampling time, a second A/D converter for developing second digital data corresponding to the amplitude of said input analog signal at a second sampling time different from said certain sampling time, said characteristic-data including both said first digital data and said second digital data.

Claim 23

An analog to digital converter system as defined in claim 19, wherein said memory means includes an address port and a data port, said first and second data being applied to said address port for output from said data port of a digital correction signal which corresponds to calibration data stored in said memory means at an address which corresponds to an address defined by said first and second data.

Claim 24

An analog to digital converter system as defined in claim 20, wherein said digital correction signal is effectively added to the digital output of said converter system to obtain static and dynamic error correction.

Claim 27

A method as defined in claim 22 wherein the testing and adjusting steps are performed by coupling a digital computer to the to the calibration and digital output ports to register the output data, generate the calibration data and apply the calibration data and control signal to the electrically alterable memory, and wherein the digital computer is then decoupled from the calibration and output ports for normal operation of the conversion circuitry.

Claim 30

A method as defined in claim 24 including the steps of converting the first digital signal to a third analog signal, comparing the first and third analog signals to develop a subrange analog signal, and converting the subrange analog signal to a subrange digital signal, and adding the subrange digital signal to the first digital signal and the error correction signal in developing the output digital signal.

Claim 31

A method as defined in claim 24, wherein the sampling steps are perfomed periodically at a certain rate, the steps of applying an input analog test signal at a rate approaching said certain rate while developing digital test data from the digital output signal, generating calibration data from the digital test data, and using the generated calibration data in subsequent connversion operations.

Claim 32

A method as defined in claim 26, wherein the calibation data is generated from digital output data which includes data corresponding to at least the second and third harmonics of the applied input analog test signal.