US4227183A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analog to digital converting device
Assignee: Japan Broadcasting Corp
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Filing: 1977-12-16
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Granted: 1980-10-07
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Expires: 1997-12-16
Abstract
Abstract In an analog to digital converting device having plural converting stages provided for converting an analog signal to a multi-bit digital signal, the lowest or just preceding converting stages, wherein analog signals to be converted are quantized by minute steps and can be regarded as similar to Gaussian noises, are arranged to form equivalent digital signals. The analog signals are compared with reference levels based on the average level of the analog signals, for instance, alternating components of analog signals are compared with a zero level, hereby improving accuracy of the conversion by minimizing the effect of DC and gain drift.
Inventors
- 👤 Yuichi Ninomiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 03:51
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/06; H03M1/0602; H03M1/0604; H03M1/0607; H03M1/0617; H03M1/0634; H03M1/0656; H03M1/0658; H03M1/12; H03M1/14; H03M1/145
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
228 words
An analog to digital converting device comprising a plurality of analog to digital converting stages connected in cascade for converting an input analog signal to a digital signal consisting of a plurality of bits, a far lower order for converting stage of said plurality of analog to digital converting stages comprising a plurality of comparators for comparing an input analog signal with a respective reference level; a resistor ladder comprising a plurality of resistors connected successively with one another and with a constant current source in series for supplying said comparators with respective reference levels derived successively from connection points of said resistor ladder; an average level detector comprising a series connection of a resistor and a grounded capacitor for detecting the average level of said input analog signal, said average level being derived from a connection point of said series connection; a DC level shifter connected between said connection point of said series connection of said resistor and said grounded capacitor of said average level detector and a bottom of said resistor ladder for shifting said average level derived from said connection point to a level which corresponds to one of said respective reference levels derived successively from said connection points of said resistor ladder, and a code converter provided for converting successive output signals derived from said plurality of comparators to a binary code digital signal.
Claim 2
Dependent Claim
228 words
An analog to digital converting device comprising a plurality of analog to digital converting stages connected in cascade for converting an input analog signal to a digital signal consisting of a plurality of bits, a far lower order for converting stage of said plurality of analog to digital converting stages comprising a plurality of comparators for comparing an input analog signal with a respective reference level; a resistor ladder comprising a plurality of resistors connected successively with one another and with a constant current source in series for supplying said comparators with respective reference levels derived successively from connection points of said resistor ladder; an average level detector comprising a series connection of a resistor and a grounded capacitor for detecting the average level of said input analog signal, said average level being derived from a connection point of said series connection; a DC level shifter connected between said connection point of said series connection of said resistor and said grounded capacitor of said average level detector and a bottom of said resistor ladder for shifting said average level derived from said connection point to a level which corresponds to one of said respective reference levels derived successively from said connection points of said resistor ladder, and a code converter provided for converting successive output signals derived from said plurality of comparators to a binary code digital signal.
Claim 3
Dependent Claim
36 words
An analog to digital converting device as claimed in claim 1, wherein said one of said respective reference levels which corresponds to the level to which said average level is shifted, is a center-most reference level.
References Cited (Backward Citations)
DE2452949A1
Cited
US4110745A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1983-10-07 | 1984-04-07 | 1984-10-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1987-10-07 | 1988-04-07 | 1988-10-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1991-10-07 | 1992-04-07 | 1992-10-07 | $7700.00 | Window Closed / Lapsed |