US4110745A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Analog to digital converter
Assignee: Japan Broadcasting Corp
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Filing: 1975-10-28
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Granted: 1978-08-29
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Expires: 1995-10-28
Abstract
Abstract An analog to digital converter used for converting such an analog signal having dc parts of a constant level periodically as a television picture signal, comprising a plurality of comparators comparing the analog signal with several reference voltage levels, and at least one dc clamper clamping the reference voltage levels in relation to the constant dc level contained in the analog signal. Consequently, the influence affected by dc drifts occuring in the signals and circuit elements may be avoided, so that, high exactness of conversion can be obtained. Besides, in a cascade connection of such converters converting respectively differential analog signals delayed successively to successive bits, high bit rate conversion can be performed without use of high speed circuit elements.
Inventors
- 👤 Yuichi Ninomiya
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 09:23
CPC Classifications
H; H04; H04N; H04N7/00; H04N7/24; H03; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/36; H03M1/361; H03M1/362; H03M1/363
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
273 words
An analog to digital converter wherein an input analog signal having periodically appearing reference dc levels to be converted to a digital signal is compared with at least one reference voltage to produce at least one digital output signal, said analog to digital converter comprising: comparator means having at least one signal comparator for comparing said input analog signal with said reference voltage to form said digital output signal, a series circuit having at least one constant current source and at least one resistor connected in series therewith for supplying said reference voltage to said signal comparator, and dc clamping means receiving said input analog signal for periodically clamping the level of said reference voltage at a constant dc voltage level related to said reference dc level in the input analog signal, said dc clamping means including a clamper comparator for receiving said input analog signal and a clamper reference signal corresponding to said reference voltage for comparing said clamper reference signal with said reference dc level in said input analog signal, switching means having a first terminal connected to an output terminal of said clamper comparator, a capacitor connected between a second terminal of said switching means and ground, said capacitor being charged or discharged in accordance with the output signal derived from said clamper comparator, and a buffer connected between the junction between said capacitor and said switching means and an input terminal of said clamper comparator for supplying said clamper reference signal, said switching means being opened or closed in accordance with the level difference between the output signal derived from said clamper comparator and the voltage at said junction.
Claim 2
Dependent Claim
273 words
An analog to digital converter wherein an input analog signal having periodically appearing reference dc levels to be converted to a digital signal is compared with at least one reference voltage to produce at least one digital output signal, said analog to digital converter comprising: comparator means having at least one signal comparator for comparing said input analog signal with said reference voltage to form said digital output signal, a series circuit having at least one constant current source and at least one resistor connected in series therewith for supplying said reference voltage to said signal comparator, and dc clamping means receiving said input analog signal for periodically clamping the level of said reference voltage at a constant dc voltage level related to said reference dc level in the input analog signal, said dc clamping means including a clamper comparator for receiving said input analog signal and a clamper reference signal corresponding to said reference voltage for comparing said clamper reference signal with said reference dc level in said input analog signal, switching means having a first terminal connected to an output terminal of said clamper comparator, a capacitor connected between a second terminal of said switching means and ground, said capacitor being charged or discharged in accordance with the output signal derived from said clamper comparator, and a buffer connected between the junction between said capacitor and said switching means and an input terminal of said clamper comparator for supplying said clamper reference signal, said switching means being opened or closed in accordance with the level difference between the output signal derived from said clamper comparator and the voltage at said junction.
Claim 3
Dependent Claim
34 words
An analog to digital converter as claimed in claim 1, wherein said switching means consists of an electronic switch controlled by a keying pulse which is formed in relation to the input analog signal.
Claim 4
Dependent Claim
38 words
An analog to digital converter as claimed in claim 1 which further includes a dc voltage source coupled to said junction by a resistor having a relatively high resistance, and wherein said switching means consists of a diode.
Claim 5
Dependent Claim
91 words
An analog to digital converter as claimed in claim 1, wherein said series circuit comprises a plurality of resistors connected in series for supplying a plurality of reference voltages, said comparator means comprises a plurality of signal comparators provided to receive said input analog signal and a corresponding one of said plurality of reference voltages, and which further comprises a code converter, said converter being coupled to the output terminals of said plurality of signal comparators for converting the output digital signals derived from said signal comparators to a coded signal.
Claim 6
Dependent Claim
70 words
An analog to digital converter as claimed in claim 4, further comprising: a digital to analog converter for converting said coded signal derived from said code converter to an analog signal, delay means for delaying said input analog signal, and an operational amplifier for producing a differential output signal between said analog signal derived from said digital to analog converter and a delayed analog signal derived from said delay means.
Claim 7
Dependent Claim
71 words
An analog to digital converter as claimed in claim 1, further comprising: a digital to analog converter for converting said digital output signal derived from said signal comparator to an analog signal, delay means for delaying said input analog signal, and an operational amplifier for producing a differential output signal between said analog signal derived from said digital to analog converter and a delayed analog signal derived from said delay means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-08-28 | 1982-02-27 | 1982-08-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-08-28 | 1986-02-27 | 1986-08-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-08-28 | 1990-02-27 | 1990-08-29 | $7700.00 | Window Closed / Lapsed |