Dynamic ram cell with isolated trench capacitors

Claim 1

A dynamic random-access memory cell of the type having at least one storage capacitor and at least one access transistor formed at a face of a semiconductor body, comprising: a pair of parallel trenches extending into said face of the semiconductor body on opposite sides of a semiconductor region formed by said parallel trenches, a heavily-doped transistor drain region formed in the upper portion of said semiconductor region between said parallel trenches, a conductive material filling a lower portion of said trenches and insulated by a capacitor dielectric from the sidewalls of said semiconductor region between said parallel trenches, a pair of separate capacitor regions each formed in a lower portion of each sidewall of said semiconductor region between said parallel trenches, the capacitor regions doped with impurity different from the doping of said body, each said capacitor region being spaced from said drain region by a channel area in said sidewall, and each capacitor region being electrically isolated along said face from other capacitor regions of other cells, and a gate separated from each said channel area by a transistor gate oxide, wherein said storage capacitor is formed by said conductive material, said capacitor dielectric and at least one of said capacitor regions formed in said sidewall.