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US4896196A Expired / Lapsed US ⏱️ 0.0 years remaining

Vertical DMOS power transistor with an integral operating condition sensor

Assignee: Vishay Siliconix Inc
•
Filing: 1988-09-08
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Granted: 1990-01-23
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Expires: 2008-09-08
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Abstract

Abstract A vertical DMOS or IGBT cell structure with an integral operating condition sensor provided by a sensor region forming a PN junction 65 with an adjacent region of the cell and having a sensor region contact 75 for conducting a test current without interfering with normal operation of the cell.

Inventors

  • 👤 Richard A. Blanchard
  • 👤 David Cooper

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 02:31
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/669; H10D12/00; H10D12/411; H10D12/441; H10D62/00; H10D62/10; H10D62/17; H10D62/393; H10D84/00; H10D84/101; H10D84/141; H10D84/143; H10D84/80; H10D84/811

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 193 words
In a vertical DMOS semiconductor structure in which a drain of said vertical DMOS structure is formed in a semiconductor substrate, a body region of said vertical DMOS semiconductor structure having a conductivity type opposite the conductivity type of said drain is formed within said drain, and a source of said vertical DMOS semiconductor structure having a conductivity type opposite said conductivity type of said body region is formed within said body region a structure for sensing temperature comprising: an operating condition sensor region within said drain of said vertical DMOS semiconductor structure comprising: a sensor body region having the same conductivity type as said body region of said vertical DMOS semiconductor structure, said sensor body region being joined with said body region of said vertical DMOS structure; a sensor source region having a conductivity type opposite that of said sensor body region; and a contact attached to said sensor source region for forward biasing said sensor source region with respect to said sensor body region, wherein, when said contact is biasing said sensor source region, said operating condition sensor region conducts a current related to a temperature of said vertical DMOS structure.
Claim 2
Dependent Claim 193 words
In a vertical DMOS semiconductor structure in which a drain of said vertical DMOS structure is formed in a semiconductor substrate, a body region of said vertical DMOS semiconductor structure having a conductivity type opposite the conductivity type of said drain is formed within said drain, and a source of said vertical DMOS semiconductor structure having a conductivity type opposite said conductivity type of said body region is formed within said body region a structure for sensing temperature comprising: an operating condition sensor region within said drain of said vertical DMOS semiconductor structure comprising: a sensor body region having the same conductivity type as said body region of said vertical DMOS semiconductor structure, said sensor body region being joined with said body region of said vertical DMOS structure; a sensor source region having a conductivity type opposite that of said sensor body region; and a contact attached to said sensor source region for forward biasing said sensor source region with respect to said sensor body region, wherein, when said contact is biasing said sensor source region, said operating condition sensor region conducts a current related to a temperature of said vertical DMOS structure.
Claim 3
Dependent Claim 46 words
A structure as in claim 1 in which said sensor body region is doped sufficiently so that the parasitic bipolar transistor formed by said sensor source region, said sensor body region, and said drain has a current gain not significantly greater than unity at biasing levels.
Claim 4
Dependent Claim 143 words
In a vertical DMOS semiconductor structure in which a drain of said vertical DMOS structure is formed in a semiconductor substrate, a body region of said vertical DMOS semiconductor structure is formed within said drain, and a source of said vertical DMOS semiconductor structure is formed within said body region, a structure for sensing temperature comprising: an operating condition sensor region comprising a diode located on the surface of said semiconductor substrate proximate to said vertical DMOS semiconductor structure; a pair of contacts, one contact coupled to an anode of said diode and the other contact coupled to a cathode of said diode, for applying voltage to and detecting current through said operating condition sensor region; wherein, when said voltage is applied by said pair of contacts, said operating condition sensor region conducts a current related to temperature of said vertical DMOS structure.
Claim 5
Dependent Claim 143 words
In a vertical DMOS semiconductor structure in which a drain of said vertical DMOS structure is formed in a semiconductor substrate, a body region of said vertical DMOS semiconductor structure is formed within said drain, and a source of said vertical DMOS semiconductor structure is formed within said body region, a structure for sensing temperature comprising: an operating condition sensor region comprising a diode located on the surface of said semiconductor substrate proximate to said vertical DMOS semiconductor structure; a pair of contacts, one contact coupled to an anode of said diode and the other contact coupled to a cathode of said diode, for applying voltage to and detecting current through said operating condition sensor region; wherein, when said voltage is applied by said pair of contacts, said operating condition sensor region conducts a current related to temperature of said vertical DMOS structure.
Claim 6
Dependent Claim 38 words
A structure for sensing temperature as in claim 3 in which said operating condition sensor region comprises a diode and a dielectric material, said dielectric material located so as to electrically insulate said diode from said drain region.
Claim 7
Dependent Claim 121 words
A structure for sensing temperature as in claim 1 in which said vertical DMOS semiconductor structure is part of an insulated gate bipolar transistor device, said insulated gate bipolar transistor device comprising: a substrate layer of a first conductivity type; a first region adjacent said substrate layer having a second conductivity type opposite said first conductivity type, said first region serving as said drain; a second region within said first region having said first conductivity type serving as said body region; a third region within said second region having said second conductivity type and serving as said source; and a gate formed over at least a portion of said second region for controlling current flow between said first and third regions.
Claim 8
Dependent Claim 193 words
In a vertical DMOS semiconductor structure in which a drain of said vertical DMOS structure is formed in a semiconductor substrate, a body region of said vertical DMOS semiconductor structure having a conductivity type opposite the conductivity type of said drain is formed within said drain, and a source of said vertical DMOS semiconductor structure having a conductivity type opposite said conductivity type of said body region is formed within said body region, a structure for sensing temperature comprising: an operating condition sensor region within said drain of said vertical DMOS semiconductor structure comprising: a sensor body region having the same conductivity type as said body region of said vertical DMOS semiconductor structure, said sensor body region being separate from said body region of said vertical DMOS structure; a sensor source region having a conductivity type opposite that of said sensor body region; and a contact attached to said sensor source region for forward biasing said sensor source region with respect to said sensor body region, wherein, when said contact is biasing said sensor source region, said operating condition sensor region conducts a current related to a temperature of said vertical DMOS structure.
Claim 9
Dependent Claim 193 words
In a vertical DMOS semiconductor structure in which a drain of said vertical DMOS structure is formed in a semiconductor substrate, a body region of said vertical DMOS semiconductor structure having a conductivity type opposite the conductivity type of said drain is formed within said drain, and a source of said vertical DMOS semiconductor structure having a conductivity type opposite said conductivity type of said body region is formed within said body region, a structure for sensing temperature comprising: an operating condition sensor region within said drain of said vertical DMOS semiconductor structure comprising: a sensor body region having the same conductivity type as said body region of said vertical DMOS semiconductor structure, said sensor body region being separate from said body region of said vertical DMOS structure; a sensor source region having a conductivity type opposite that of said sensor body region; and a contact attached to said sensor source region for forward biasing said sensor source region with respect to said sensor body region, wherein, when said contact is biasing said sensor source region, said operating condition sensor region conducts a current related to a temperature of said vertical DMOS structure.
Claim 10
Dependent Claim 27 words
A structure as in claim 6 wherein said body region of said vertical DMOS structure and said sensor body region are electrically connected together by a conductor.
Claim 11
Dependent Claim 26 words
A structure as in claim 6 wherein said body region of said vertical DMOS structure and said sensor body region are contacted by separate electrical conductors.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-01-22 1993-07-24 1994-01-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-01-22 1997-07-24 1998-01-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-01-22 2001-07-24 2002-01-23 $7700.00 Window Closed / Lapsed

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