Sensing circuits

Claim 1

A sensing circuit which comprises a four-terminal semiconductor device having a first semiconductor region of one conductivity type, a second semiconductor region of the opposite conductivity type adjacent said first region with a first semiconductor junction therebetween, a third semiconductor region of the same type as said first region adjacent said second region with a second semiconductor junction therebetween, said first and third regions of the semiconductor device having an impurity concentration of substantially the same order of magnitude and a fourth semiconductor region of the same conductivity type as said second region being provided in contact with said first region at a position which is spaced from said first junction by a distance which is smaller than the diffusion distance of the minority carriers forming a potential barrier, a potential source, a bias circuit for said second semiconductor region, a sensing element connected between said fourth and first semiconductor regions, said sensing element having a resistance value dependent upon a given environment condition, a biasing circuit for said first semiconductor region, a load connected between said potential source and said third semiconductor region, and an output terminal connected to said third semiconductor region.