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US4760434A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device with protective means against overheating

Assignee: Denso Corp
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Filing: 1986-11-28
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Granted: 1988-07-26
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Expires: 2006-11-28
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Abstract

Abstract A semiconductor substrate has a power region and a control region. The control region is located in the center portion of the substrate, and the power region surrounds the control region and is separated therefrom. A vertical type, MOS transistor, i.e., an active semiconductor element, is formed on the power region. An insulation film is formed on part of the control region. A polycrystalline silicon diode, which functions as a heat-sensitive element, is formed on the insulation film. A control section comprising a lateral type, MOS transistor is also formed on the control region. The lateral type, MOS transistor is connected to receive a signal form the polycrystalline silicon diode. Further, a polycrystalline silicon resistor, which determines a circuit constant, is formed on the insulation film. The MOS transistor protects the active semiconductor element in response to a signal supplied from the heat-sensitive element showing that the temperature of the semiconductor substrate has risen above a predetermined value. For example, the active semiconductor element may be disabled until the detected temperature drops below a predetermined value.

Inventors

  • 👤 Yukio Tsuzuki
  • 👤 Masami Yamaoka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:31
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/101; H10D84/141; H10D84/143; H10D84/148; H10D89/00; H10D89/60; H10W; H10W40/00

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 147 words
A semiconductor device comprising: a semiconductor substrate having first and second semiconductor regions separate from each other; an active semiconductor element formed in the first region of said semiconductor substrate; an insulation film formed on a surface of the substrate corresponding to the second region of said semiconductor substrate; a heat-sensitive element, formed in a semiconductor layer on said insulation film in such a manner that said heat-sensitive element is separated from said semiconductor substrate, for detecting heat generated by said active semiconductor element formed in the semiconductor substrate, and for outputting a heat detecting signal; and control means, formed on at least one of said second region and said insulating film, and electrically connected to said heat-sensitive element by a conducting member, for protecting the active element formed in the semiconductor substrate from thermal breakdown, based on the heat detecting signal supplied from the heat-sensitive element.
Claim 2
Dependent Claim 147 words
A semiconductor device comprising: a semiconductor substrate having first and second semiconductor regions separate from each other; an active semiconductor element formed in the first region of said semiconductor substrate; an insulation film formed on a surface of the substrate corresponding to the second region of said semiconductor substrate; a heat-sensitive element, formed in a semiconductor layer on said insulation film in such a manner that said heat-sensitive element is separated from said semiconductor substrate, for detecting heat generated by said active semiconductor element formed in the semiconductor substrate, and for outputting a heat detecting signal; and control means, formed on at least one of said second region and said insulating film, and electrically connected to said heat-sensitive element by a conducting member, for protecting the active element formed in the semiconductor substrate from thermal breakdown, based on the heat detecting signal supplied from the heat-sensitive element.
Claim 3
Dependent Claim 55 words
A semiconductor device according to claim 1, wherein said second region is located in a surface region of the semiconductor substrate, said second region being a semiconductor region of a different conductivity type than said substrate and being located in the substantially center part of said semiconductor substrate, said first region surrounding said second region.
Claim 4
Dependent Claim 56 words
A semiconductor device according to claim 1, wherein said heat-sensitive element is comprised of said semiconductor layer having a PN junction made of polycrystalline silicon formed on said insulation film, the forward voltage of said PN junction varying as the temperature of said semiconductor substrate changes according to the heat generated by said active semiconductor element.
Claim 5
Dependent Claim 45 words
A semiconductor device according to claim 1, wherein said heat-sensitive element is comprised of a plurality of polycrystalline silicon diodes which are formed in said semiconductor layer and connected in series, each having a PN juction made of polycrystalline silicon formed on said insulation film.
Claim 6
Dependent Claim 31 words
A semiconductor device according to claim 1, wherein said control means includes a plurality of resistors, at least one of which is a polycrystalline silicon resistor formed on said insulation film.
Claim 7
Dependent Claim 51 words
A semiconductor device accoding to claim 1, wherein said heat-sensitive element is comprised of a PN junction made of polycrystalline silicon formed on said insulation film, a low impurity-concentration region within the P or N region of said PN junction having an impurity concentration of at least 1×10 19 cm.sup. -3.
Claim 8
Dependent Claim 16 words
A semiconductor device according to claim 6, wherein said low impurity-concentration region is doped with boron.
Claim 9
Dependent Claim 24 words
A semiconductor device according to claim 6, wherein said active semiconductor element formed in said first region is a vertical type power MOS transistor.
Claim 10
Dependent Claim 49 words
A semiconductor device according to claim 1, wherein said control means includes a lateral type MOS transistor formed in the second region of said semiconductor substrate which is electrically connected to a conductive member through an opening in said insulation film to receive a signal from said heat-sensitive element.
Claim 11
Dependent Claim 83 words
A semiconductor device according to claim 1, wherein said second region is a surface region of the semiconductor substrate and is located in the substantially center part of said semiconductor substrate and set apart from said first region, said heat-sensitive element being formed on said insulation film and comprised of a polycrystalline silicon diode, and said control means comprising a lateral type MOS transistor formed in that portion of the surface region of said substrate on which said insulation film is not formed.
Claim 12
Dependent Claim 182 words
A semiconductor integrated circuit device comprising: a semiconductor body; a vertical type power MOS transistor element formed in said semiconductor body; a semiconductor region located in the substantially center part of one surface region of said semiconductor body, said region being a different conductivity type from said semiconductor body; a heat-sensitive element including at least one diode element formed by a PN junction being formed in a polycrystalline silicon semiconductor layer on an insulation film formed on said semiconductor region, said heat-sensitive element detecting the temperature of said semiconductor body rising due to the heat generated by said power MOS transistor element; and control means formed on at least one of the semiconductor region formed in said one surfact region of said semiconductor body and the polycrystalline silicon semiconductor layer formed in said insulation film, said control means including a conductive member which electrically connects said control means to said at least one diode element, for protecting said power MOS transistor element from thermal breakdwon according to the level of a forward drop voltage generated in said at least one diode element.
Claim 13
Dependent Claim 182 words
A semiconductor integrated circuit device comprising: a semiconductor body; a vertical type power MOS transistor element formed in said semiconductor body; a semiconductor region located in the substantially center part of one surface region of said semiconductor body, said region being a different conductivity type from said semiconductor body; a heat-sensitive element including at least one diode element formed by a PN junction being formed in a polycrystalline silicon semiconductor layer on an insulation film formed on said semiconductor region, said heat-sensitive element detecting the temperature of said semiconductor body rising due to the heat generated by said power MOS transistor element; and control means formed on at least one of the semiconductor region formed in said one surfact region of said semiconductor body and the polycrystalline silicon semiconductor layer formed in said insulation film, said control means including a conductive member which electrically connects said control means to said at least one diode element, for protecting said power MOS transistor element from thermal breakdwon according to the level of a forward drop voltage generated in said at least one diode element.
Claim 14
Dependent Claim 211 words
A semiconductor integrated circuit device comprising: a semiconductor body; a semiconductor element formed in said semiconductor body; a semiconductor region formed in one surface region of said semiconductor body, said region being a different conductivity type from said semiconductor body; a heat-sensitive element formed in a polysrystalline silicon semiconductor layer on an insulation film formed on said semiconductor region, said heat-sensitive element having a plurality of PN junctions including each of a pair of highly doped regions and lowly doped regions, and further including a conductive member which connects said plurality of PN junctions to each other in series in the same polar direction so as to form a plurality of diode elements, the impurity concentration of said slowly doped region being 1×10 19 cm -3 or more, and the temperature of said conductive body generated by said semiconductor element being detected by said plurality of diodes; and a control element, formed in at least a portion of said semiconductor region being formed on said one surface region of said semiconductor body and electrically connected to said plurality of diodes through the conductive member, for controlling said semiconductor element according to the level of a forward drop voltage generated on said diode elements, thereby protecting the semiconductor element from thermal breakdown.
Claim 15
Dependent Claim 211 words
A semiconductor integrated circuit device comprising: a semiconductor body; a semiconductor element formed in said semiconductor body; a semiconductor region formed in one surface region of said semiconductor body, said region being a different conductivity type from said semiconductor body; a heat-sensitive element formed in a polysrystalline silicon semiconductor layer on an insulation film formed on said semiconductor region, said heat-sensitive element having a plurality of PN junctions including each of a pair of highly doped regions and lowly doped regions, and further including a conductive member which connects said plurality of PN junctions to each other in series in the same polar direction so as to form a plurality of diode elements, the impurity concentration of said slowly doped region being 1×10 19 cm -3 or more, and the temperature of said conductive body generated by said semiconductor element being detected by said plurality of diodes; and a control element, formed in at least a portion of said semiconductor region being formed on said one surface region of said semiconductor body and electrically connected to said plurality of diodes through the conductive member, for controlling said semiconductor element according to the level of a forward drop voltage generated on said diode elements, thereby protecting the semiconductor element from thermal breakdown.

References Cited (Backward Citations)

JPS5272183A Cited
US4198581A Cited
US4492974A Cited
JPS57145355A Cited
EP0075833A2 Cited
JPS58138074A Cited
JPS59224172A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-07-26 1992-01-25 1992-07-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-07-26 1996-01-25 1996-07-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-07-26 2000-01-25 2000-07-26 $7700.00 Window Closed / Lapsed

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