High voltage level shift semiconductor device

Claim 2

A semiconductor device comprising: a substrate of first conductivity type; a body region of first conductivity type extending into said substrate from a surface, said body region having a doping level greater than the doping level of said substrate; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said substrate; a combined drain resistor voltage divider region of second conductivity type extending into said substrate from said surface, said combined drain resistor voltage divider region having a first portion positioned adjacent to said body region and functioning as a drain region for said source region of second conductivity type, and a second portion positioned away from said body region; a first contact region of second conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface to permit connection to an electrical potential; a second contact region of second conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned between said first contact region and the edge of said combined drain resistor voltage divider region adjacent to said body region, said second contact region providing an electrical potential which is a function of the position of said second contact region with respect to said first contact region and the current flow in said combined drain resistor voltage divider region, whereby during operation of the semiconductor device the electrical potential provided by said second contact region has a magnitude which is between the electrical potential of said source region of second conductivity type and the electrical potential of said first contact region; a channel region in said substrate extending to said surface between said combined drain resistor voltage divider region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said substrate; an insulating material on said surface and extending from said source region to said combined drain resistor voltage divider region; and a gate on said insulating material, said gate being positioned above said channel region in said body region and said channel region in said substrate.

Claim 3

The device of claim 1, wherein the part of said first portion of said combined drain resistor voltage divider region adjacent to said channel region in said substrate extends into said substrate to a first depth and said second portion of said combined drain resistor voltage divider region extends into said substrate to a second depth greater than said first depth.

Claim 4

The device of claim 2, including a source region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface, a drain region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface and being positioned adjacent to said source region of first conductivity type, a channel region in said second portion of said combined drain resistor voltage divider region extending to said surface between said source region of first conductivity type and said drain region of first conductivity type, an insulating material on said surface above said channel region in said second portion of said combined drain resistor voltage divider region, and a gate on said insulating material above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 5

The divider of claim 3, including means electrically connecting said second contact region to said gate positioned above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 6

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial layer; an insulating material on said surface extending from said source region to said combined drain resistor region; an insulating material on said surface extending from said source region to said combined drain resistor region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region and said channel region in said epitaxial layer; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a drain region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a source region of first conductivity type extending from said surface into the portion of said combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 7

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial layer; an insulating material on said surface extending from said source region to said combined drain resistor region; an insulating material on said surface extending from said source region to said combined drain resistor region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region and said channel region in said epitaxial layer; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a drain region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a source region of first conductivity type extending from said surface into the portion of said combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 8

The device of claim 5, including a first contact region of second conductivity type extending into said Il combined drain resistor region from said surface and means electrically connecting said first contact region to said second gate.

Claim 9

The device of claim 1, wherein said combined drain resistor voltage divider region includes a source region of first conductivity type extending into said combined drain resistor voltage divider region from said surface, a drain region of first conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned adjacent to said source region of first conductivity type, a channel region in said combined drain resistor voltage divider region extending to said surface between said source region of first conductivity type and said drain region of first conductivity type, an insulating material on said surface above said channel region in said combined drain resistor voltage divider region and a gate on said insulating material above said channel region in said combined drain resistor voltage divider region.

Claim 10

The device of claim 7, including means electrically connecting said second contact region to said gate positioned above said channel region in said combined drain resistor voltage divider region.

Claim 11

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial layer; an insulating material on said surface extending from said source region to said combined drain resistor region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region and said channel region in said epitaxial layer; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a collector region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a base region of second conductivity type extending into said collector region; an emitter region of first conductivity type extending into said base region; and a collector contact region of first conductivity type extending into said collector region.

Claim 12

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial layer; an insulating material on said surface extending from said source region to said combined drain resistor region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region and said channel region in said epitaxial layer; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a collector region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a base region of second conductivity type extending into said collector region; an emitter region of first conductivity type extending into said base region; and a collector contact region of first conductivity type extending into said collector region.

Claim 13

The device of claim 9, including a first contact region of second conductivity type extending into said combined drain resistor region from said surface and means electrically connecting said first contact region to said base region.

Claim 14

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of second conductivity type on said substrate; a body region of second conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of first conductivity type extending into said body region from said surface to a depth less than said body region extends into said substrate; a combined drain resistor region of first conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial layer; an insulating material on said surface and extending from said source region to said combined drain resistor region; a first gate on said insulating material, said gate being positioned above said channel region in said body region and said channel region in said epitaxial layer; a source region of second conductivity type extending into said combined drain resistor region from said surface; a drain region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said source region of second conductivity type; a drain contact region of second conductivity type extending into said drain region of second conductivity type from said surface and being positioned adjacent to said combined drain resistor region; a drift region extending along said surface between said drain contact region and said combined drain resistor region; a channel region extending to said surface between said source region of second conductivity type and said drift region; an insulating material on said surface above said channel region in said combined drain resistor region; a second gate on said insulating material above said channel region in said combined drain resistor region; and an isolation region of first conductivity type extending from said surface of said epitaxial layer into said epitaxial layer to said substrate and surrounding said source region of second conductivity type, said drain region of second conductivity type, said drift region and said channel region which extends between said source region of second conductivity type and said drift region.

Claim 15

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of second conductivity type on said substrate; a body region of second conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of first conductivity type extending into said body region from said surface to a depth less than said body region extends into said substrate; a combined drain resistor region of first conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial layer; an insulating material on said surface and extending from said source region to said combined drain resistor region; a first gate on said insulating material, said gate being positioned above said channel region in said body region and said channel region in said epitaxial layer; a source region of second conductivity type extending into said combined drain resistor region from said surface; a drain region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said source region of second conductivity type; a drain contact region of second conductivity type extending into said drain region of second conductivity type from said surface and being positioned adjacent to said combined drain resistor region; a drift region extending along said surface between said drain contact region and said combined drain resistor region; a channel region extending to said surface between said source region of second conductivity type and said drift region; an insulating material on said surface above said channel region in said combined drain resistor region; a second gate on said insulating material above said channel region in said combined drain resistor region; and an isolation region of first conductivity type extending from said surface of said epitaxial layer into said epitaxial layer to said substrate and surrounding said source region of second conductivity type, said drain region of second conductivity type, said drift region and said channel region which extends between said source region of second conductivity type and said drift region.

Claim 16

The device of claim 11, including a contact region of second conductivity type in said combined drain resistor region and means electrically connecting said contact region to said second gate.

Claim 17

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of second conductivity type on said substrate; an isolation region of first conductivity type extending from a surface of said epitaxial layer through said epitaxial layer to said substrate thereby forming a combined drain resistor region bounded by said isolation region; a body region of first conductivity type extending into said combined drain resistor region from a surface; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said combined drain resistor region, said source region being positioned adjacent to said combined drain resistor region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on the surface of said combined drain resistor region; a first gate on said insulating material and positioned above said channel region in said body region; a source region of first conductivity type extending into said combined drain resistor region from said surface; a drain region of first conductivity type extending into said combined drain resistor region adjacent to said source region; a channel region in said combined drain resistor region and extending to said surface between said source region of first conductivity type and said drain region of first conductivity type; an insulating material on said surface above said channel region in said combined drain resistor region; a second gate on said insulating material above said channel region in said combined drain resistor region; a contact region of second conductivity type extending into said combined drain resistor region; and means electrically connecting said contact region and said second gate.

Claim 18

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of second conductivity type on said substrate; an isolation region of first conductivity type extending from a surface of said epitaxial layer through said epitaxial layer to said substrate thereby forming a combined drain resistor region bounded by said isolation region; a body region of first conductivity type extending into said combined drain resistor region from a surface; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said combined drain resistor region, said source region being positioned adjacent to said combined drain resistor region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on the surface of said combined drain resistor region; a first gate on said insulating material and positioned above said channel region in said body region; a source region of first conductivity type extending into said combined drain resistor region from said surface; a drain region of first conductivity type extending into said combined drain resistor region adjacent to said source region; a channel region in said combined drain resistor region and extending to said surface between said source region of first conductivity type and said drain region of first conductivity type; an insulating material on said surface above said channel region in said combined drain resistor region; a second gate on said insulating material above said channel region in said combined drain resistor region; a contact region of second conductivity type extending into said combined drain resistor region; and means electrically connecting said contact region and said second gate.

Claim 19

The device of claim 13, wherein said drain region includes a first portion adjacent to said channel region in said combined drain resistor, said first portion having a first doping concentration and extending into said combined drain resistor region to a first depth, and said drain region including a second, thicker portion positioned away from said channel region, with said second portion having a doping concentration greater than said first portion.

Claim 20

The semiconductor device of claim 13, wherein the doping concentration of said combined drain resistor region is in the range of from 1×10 14 atoms per cubic centimeter to 1×10 15 atoms per cubic centimeter.

Claim 21

The semiconductor device of claim 15, wherein the doping concentration of said substrate is in the range of from 1×10 14 atoms per cubic centimeter to 1×10 15 atoms per cubic centimeter and the resistivity of said substrate is in the range of from five ohm-cm to forty ohm-cm.

Claim 22

The semiconductor device of claim 14, wherein the doping concentration of said combined drain resistor region is in the range of from 1×10 14 atoms per cubic centimeter to 1×10 15 atoms per cubic centimeter.

Claim 23

The semiconductor device of claim 17, wherein the doping concentration of said substrate is in the range of from 1×10 14 atoms per cubic centimeter to 1×10 15 atoms per cubic centimeter and the resistivity of said substrate is in the range of from five ohm-cm to forty ohm-cm.

Claim 24

The semiconductor device of any of claims 13-18, including a buried layer of material of second conductivity type, said buried layer being positioned below said source region of first conductivity type, said drain region of first conductivity type and said channel region in said combined drain resistor region.

Claim 25

A semiconductor device comprising: a substrate of first conductivity type; a body region of first conductivity type extending into said substrate from a surface, said body region having a doping level greater than the doping level of said substrate; a source region of said conductivity type extending into said body region from said surface to a depth less than said body region extends into said substrate; a combined drain resistor voltage divider region of second conductivity type extending into said substrate from said surface said combined drain resistor voltage divider region having a first positioned adjacent to said body region and functioning as a drain region for said source region of second conductivity type, and a second portion positioned away from said body region; a first contact region of second conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface to permit connection to an electrical potential; a second contact region of second conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned between said first contact region and the edge of said combined drain resistor voltage divider region adjacent to said body region, said second contact region providing an electrical potential which is a function of the position of said second contact region with respect to said first contact region and the current flow in said combined drain resistor voltage divider region, whereby during operation of the semiconductor device the electrical potential provided by said second contact region has a magnitude which is between the electrical potential of said source region of second conductivity type and the electrical potential of said first contact region; a channel region in said body region extending to said surface between said source region and said combined drain resistor voltage divider region; an insulating material on said surface above said channel region in said body region; and a gate on said insulating material, said gate being positioned above said channel region in said body region.

Claim 26

A semiconductor device comprising: a substrate of first conductivity type; a body region of first conductivity type extending into said substrate from a surface, said body region having a doping level greater than the doping level of said substrate; a source region of said conductivity type extending into said body region from said surface to a depth less than said body region extends into said substrate; a combined drain resistor voltage divider region of second conductivity type extending into said substrate from said surface said combined drain resistor voltage divider region having a first positioned adjacent to said body region and functioning as a drain region for said source region of second conductivity type, and a second portion positioned away from said body region; a first contact region of second conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface to permit connection to an electrical potential; a second contact region of second conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned between said first contact region and the edge of said combined drain resistor voltage divider region adjacent to said body region, said second contact region providing an electrical potential which is a function of the position of said second contact region with respect to said first contact region and the current flow in said combined drain resistor voltage divider region, whereby during operation of the semiconductor device the electrical potential provided by said second contact region has a magnitude which is between the electrical potential of said source region of second conductivity type and the electrical potential of said first contact region; a channel region in said body region extending to said surface between said source region and said combined drain resistor voltage divider region; an insulating material on said surface above said channel region in said body region; and a gate on said insulating material, said gate being positioned above said channel region in said body region.

Claim 27

The device of claim 20, wherein the part of said first portion of said combined drain resistor voltage divider region adjacent to said channel region in said body region extends into said substrate to a first depth and said second portion of said combined drain resistor voltage divider region extends into said substrate to a second depth greater than said first depth.

Claim 28

The device of claim 21, including a source region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface, a drain region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface and being positioned adjacent to said source region of first conductivity type, a channel region in said second portion of said combined drain resistor voltage divider region extending to said surface between said source region of first conductivity type and said drain region of first conductivity type, an insulating material on said surface above said channel region in said second portion of said combined drain resistor voltage divider region, and a gate on said insulating material above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 29

The device of claim 22, including means electrically connecting said second contact region to said gate positioned above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 30

The device of claim 20, wherein said combined drain resistor voltage divider region includes a source region of first conductivity type extending into said combined drain resistor voltage divider region from said surface, a drain region of first conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned adjacent to said source region of first conductivity type, a channel region in said combined drain resistor voltage divider region extending to said surface between said source region of first conductivity type and said drain region of first conductivity type, an insulating material on said surface above said channel region in said combined drain resistor voltage divider region and a gate on said insulating material above said channel region in said combined drain resistor voltage divider region.

Claim 31

The device of claim 24, including means electrically connecting said second contact region to said gate positioned above said channel region in said combined drain resistor voltage divider region.

Claim 32

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor voltage divider region of second conductivity type extending into said epitaxial layer from said surface, said combined drain resistor voltage divider region having a first portion positioned adjacent to said body region and functioning as a drain region for said source region of second conductivity type, and a second portion positioned away from said body region; a first contact region of second conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface to permit connection to an electrical potential; a second contact region of second conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned between said first contact region and the edge of said combined drain resistor voltage divider region adjacent to said body region, said second contact region providing an electrical potential which is a function of the position of said second contact region with respect to said first contact region and the current flow in said combined drain resistor voltage divider region, whereby during operation of the semiconductor device the electrical potential provided by said second contact region has a magnitude which is between the electrical potential of said source region of second conductivity type and the electrical potential of said first contact region; a heavily doped buried layer of second conductivity type formed within said substrate and said epitaxial layer; a well region of second conductivity type formed within said substrate and said epitaxial layer and encompassing said buried layer, said well region extending into said epitaxial layer to a distance such that it merges with said combined drain resistor voltage divider region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor voltage divider region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial an insulating material on said surface and extending from said source region to said combined drain resistor voltage divider region; and a gate on said insulating material, said gate being positioned above said channel region in said body region and said channel region in said epitaxial layer.

Claim 33

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor voltage divider region of second conductivity type extending into said epitaxial layer from said surface, said combined drain resistor voltage divider region having a first portion positioned adjacent to said body region and functioning as a drain region for said source region of second conductivity type, and a second portion positioned away from said body region; a first contact region of second conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface to permit connection to an electrical potential; a second contact region of second conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned between said first contact region and the edge of said combined drain resistor voltage divider region adjacent to said body region, said second contact region providing an electrical potential which is a function of the position of said second contact region with respect to said first contact region and the current flow in said combined drain resistor voltage divider region, whereby during operation of the semiconductor device the electrical potential provided by said second contact region has a magnitude which is between the electrical potential of said source region of second conductivity type and the electrical potential of said first contact region; a heavily doped buried layer of second conductivity type formed within said substrate and said epitaxial layer; a well region of second conductivity type formed within said substrate and said epitaxial layer and encompassing said buried layer, said well region extending into said epitaxial layer to a distance such that it merges with said combined drain resistor voltage divider region; a channel region in said epitaxial layer extending to said surface between said combined drain resistor voltage divider region and said body region, a channel region in said body region extending to said surface between said source region and said channel region in said epitaxial an insulating material on said surface and extending from said source region to said combined drain resistor voltage divider region; and a gate on said insulating material, said gate being positioned above said channel region in said body region and said channel region in said epitaxial layer.

Claim 34

The device of claim 26, wherein the part of said first portion of said combined drain resistor voltage divider region adjacent to said channel region in said epitaxial layer extends into said epitaxial layer to a first depth and said second portion of said combined drain resistor voltage divider region extends into said epitaxial layer to a second depth greater than said first depth.

Claim 35

The device of claim 27, including a source region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface, a drain region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface and being positioned adjacent to said source region of first conductivity type, a channel region in said second portion of said combined drain resistor voltage divider region extending to said surface between said source region of first conductivity type and said drain region of first conductivity type, an insulating material on said surface above said channel region in said second portion of said combined drain resistor voltage divider region, and a gate of said insulating material above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 36

The device of claim 28, including means electrically connecting said second contact region to said gate positioned above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 37

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor voltage divider region of second conductivity type extending into said epitaxial layer from said surface, said combined drain resistor voltage divider region having a first portion positioned adjacent to said body region and functioning as a drain region for said source region of second conductivity type, and a second portion positioned away from said body region; a first contact region of second conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface to permit connection to an electrical potential; a second contact region of second conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned between said first contact region and the edge of said combined drain resistor voltage divider region adjacent to said body region, said second contact region providing an electrical potential which is a function of the position of said second contact region with respect to said first contact region and the current flow in said combined drain resistor voltage divider region, whereby during operation of the semiconductor device the electrical potential provided by said second contact region has a magnitude which is between the electrical potential of said source region of second conductivity type and the electrical potential of said first contact region; a heavily doped buried layer of second conductivity type formed within said substrate and said epitaxial layer; a well region of second conductivity type formed within said substrate and said epitaxial layer and encompassing said buried layer, said well region extending into said epitaxial layer to a distance such that it merges with said combined drain resistor voltage divider region; a channel region in said body region extending to said surface between said source region and said combined drain resistor voltage divider region; an insulating material on said surface above said channel region in said body; a gate on said insulating material, said gate being positioned above said channel region in said body region.

Claim 38

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor voltage divider region of second conductivity type extending into said epitaxial layer from said surface, said combined drain resistor voltage divider region having a first portion positioned adjacent to said body region and functioning as a drain region for said source region of second conductivity type, and a second portion positioned away from said body region; a first contact region of second conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface to permit connection to an electrical potential; a second contact region of second conductivity type extending into said combined drain resistor voltage divider region from said surface and being positioned between said first contact region and the edge of said combined drain resistor voltage divider region adjacent to said body region, said second contact region providing an electrical potential which is a function of the position of said second contact region with respect to said first contact region and the current flow in said combined drain resistor voltage divider region, whereby during operation of the semiconductor device the electrical potential provided by said second contact region has a magnitude which is between the electrical potential of said source region of second conductivity type and the electrical potential of said first contact region; a heavily doped buried layer of second conductivity type formed within said substrate and said epitaxial layer; a well region of second conductivity type formed within said substrate and said epitaxial layer and encompassing said buried layer, said well region extending into said epitaxial layer to a distance such that it merges with said combined drain resistor voltage divider region; a channel region in said body region extending to said surface between said source region and said combined drain resistor voltage divider region; an insulating material on said surface above said channel region in said body; a gate on said insulating material, said gate being positioned above said channel region in said body region.

Claim 39

The device of claim 30, wherein the part of said first portion of said combined drain resistor voltage divider region adjacent to said channel region in said body region extends into said epitaxial layer to a first depth and said second portion of said combined drain resistor voltage divider region extends into said epitaxial layer to a second depth greater than said first depth.

Claim 40

The device of claim 31, including a source region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface, a drain region of first conductivity type extending into said second portion of said combined drain resistor voltage divider region from said surface and being positioned adjacent to said source region of first conductivity type, a channel region in said second portion of said combined drain resistor voltage divider region extending to said surface between said source region of first conductivity type and said drain region of first conductivity type, an insulating material on said surface above said channel region in said second portion of said combined drain resistor voltage divider region, and a gate on said insulating material above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 41

The device of claim 32, including means electrically connecting said second contact region to said gate positioned above said channel region in said second portion of said combined drain resistor voltage divider region.

Claim 42

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on said surface above said channel region in said body region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a drain region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a source region of first conductivity type extending from said surface into the portion of said combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 43

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on said surface above said channel region in said body region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a drain region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a source region of first conductivity type extending from said surface into the portion of said combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 44

The device of claim 34, including a first contact region of second conductivity type extending into said combined drain resistor region from said surface and means electrically connecting said first contact region to said second gate.

Claim 45

A semiconductor device comprising: a substrate of first conductivity type; a first epitaxial layer of material of first conductivity type on said substrate; a second epitaxial layer of material of first conductivity type on said first epitaxial layer; a body region of first conductivity type extending into said second epitaxial layer from a surface, said body region having a doping level greater than the doping level of said second epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said second epitaxial layer; a combined drain resistor region of second conductivity type extending into said second epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said second epitaxial layer extending to said surface between said combined drain resistor region and said body region; a channel region in said body region extending to said surface between said source region and said channel region in said second epitaxial layer; an insulating material on said surface extending from said source region to said combined drain resistor region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region and said channel region in said second epitaxial layer; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said second epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region, said buried layer extending into said substrate and into said first epitaxial layer; a second isolation region of second conductivity type extending from said buried layer into said first epitaxial layer for a distance less than the thickness of said second epitaxial layer; a third isolation region of second conductivity type having a first portion extending into said first epitaxial layer and merging with said second isolation region and having a second portion extending into said second epitaxial layer and merging with said first isolation region, thereby forming a drain region in said first and second epitaxial layers bounded by said buried layer and said first, second and third isolation regions; a source region of first conductivity type extending from said surface into the portion of said combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 46

A semiconductor device comprising: a substrate of first conductivity type; a first epitaxial layer of material of first conductivity type on said substrate; a second epitaxial layer of material of first conductivity type on said first epitaxial layer; a body region of first conductivity type extending into said second epitaxial layer from a surface, said body region having a doping level greater than the doping level of said second epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said second epitaxial layer; a combined drain resistor region of second conductivity type extending into said second epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said second epitaxial layer extending to said surface between said combined drain resistor region and said body region; a channel region in said body region extending to said surface between said source region and said channel region in said second epitaxial layer; an insulating material on said surface extending from said source region to said combined drain resistor region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region and said channel region in said second epitaxial layer; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said second epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region, said buried layer extending into said substrate and into said first epitaxial layer; a second isolation region of second conductivity type extending from said buried layer into said first epitaxial layer for a distance less than the thickness of said second epitaxial layer; a third isolation region of second conductivity type having a first portion extending into said first epitaxial layer and merging with said second isolation region and having a second portion extending into said second epitaxial layer and merging with said first isolation region, thereby forming a drain region in said first and second epitaxial layers bounded by said buried layer and said first, second and third isolation regions; a source region of first conductivity type extending from said surface into the portion of said combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 47

The device of claim 36, including a first contact region of second conductivity type extending into said combined drain resistor region from said surface and means electrically connecting said first contact region to said second gate.

Claim 48

A semiconductor device comprising: a substrate of first conductivity type; a first epitaxial layer of material of first conductivity type on said substrate; a second epitaxial layer of material of first conductivity type on said first epitaxial layer; a body region of first conductivity type extending into said second epitaxial layer from a surface, said body region having a doping level greater than the doping level of said second epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said second epitaxial layer; a combined drain resistor region of second conductivity type extending into said second epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on said surface above said channel region in said body region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said second epitaxial layer; layer of second conductivity type positioned below said first isolation region, said buried layer extending into said substrate and into said first epitaxial layer; a second isolation region of second conductivity type extending from said buried layer into said first epitaxial layer for a distance less than the thickness of said second epitaxial layer; a third isolation region of second conductivity type having a first portion extending into said first epitaxial layer and merging with said second isolation region and having a second portion extending into said second epitaxial layer and merging with said first isolation region, thereby forming a drain region in said first and second epitaxial layers bounded by said buried layer and said first, second and third isolation regions; a source region of first conductivity type into the portion of said extending from said surface combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 49

A semiconductor device comprising: a substrate of first conductivity type; a first epitaxial layer of material of first conductivity type on said substrate; a second epitaxial layer of material of first conductivity type on said first epitaxial layer; a body region of first conductivity type extending into said second epitaxial layer from a surface, said body region having a doping level greater than the doping level of said second epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said second epitaxial layer; a combined drain resistor region of second conductivity type extending into said second epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on said surface above said channel region in said body region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said second epitaxial layer; layer of second conductivity type positioned below said first isolation region, said buried layer extending into said substrate and into said first epitaxial layer; a second isolation region of second conductivity type extending from said buried layer into said first epitaxial layer for a distance less than the thickness of said second epitaxial layer; a third isolation region of second conductivity type having a first portion extending into said first epitaxial layer and merging with said second isolation region and having a second portion extending into said second epitaxial layer and merging with said first isolation region, thereby forming a drain region in said first and second epitaxial layers bounded by said buried layer and said first, second and third isolation regions; a source region of first conductivity type into the portion of said extending from said surface combined drain resistor region surrounded by said first isolation region, said source region being positioned adjacent to one edge of said combined drain resistor region; a channel region extending to said surface between said source region of first conductivity type and the adjacent edge of said combined drain resistor region; an insulating material on said surface above said channel region in said combined drain resistor region; and a second gate on said insulating material above said channel region in said combined drain resistor region.

Claim 50

The device of claim 38, including a first contact region of second conductivity type extending into said combined drain resistor region from said surface and means electrically connecting said first contact region to said second gate.

Claim 51

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on said surface above said channel region in said body region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a collector region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a base region of second conductivity type extending into said collector region; an emitter region of first conductivity type extending into said base region; and a collector contact region of first conductivity type extending into said collector region.

Claim 52

A semiconductor device comprising: a substrate of first conductivity type; an epitaxial layer of material of first conductivity type on said substrate; a body region of first conductivity type extending into said epitaxial layer from a surface, said body region having a doping level greater than the doping level of said epitaxial layer; a source region of second conductivity type extending into said body region from said surface to a depth less than said body region extends into said epitaxial layer; a combined drain resistor region of second conductivity type extending into said epitaxial layer from said surface and being positioned adjacent to said body region, said combined drain resistor region functioning as a drain region for said device and as a resistive region; a channel region in said body region extending to said surface between said source region and said combined drain resistor region; an insulating material on said surface above said channel region in said body region; a first gate on said insulating material, said first gate being positioned above said channel region in said body region; a first isolation region of second conductivity type extending from said surface through said combined drain resistor region and into said epitaxial layer; a buried layer of second conductivity type positioned below said first isolation region; a second isolation region of second conductivity type extending from said buried layer to and merging with said first isolation region thereby forming a collector region in said epitaxial layer surrounded by said buried layer and said first and second isolation regions; a base region of second conductivity type extending into said collector region; an emitter region of first conductivity type extending into said base region; and a collector contact region of first conductivity type extending into said collector region.

Claim 53

The device of claim 40, including a first contact region of second conductivity type extending into said combined drain resistor region from said surface and means electrically connecting said first contact region to said base region.