Semiconductor device

Claim 2

A semiconductor device having a semiconductor body having at least one bipolar high voltage semiconductor circuit element, said bipolar circuit element comprising: substantially flat first and second opposed surfaces on said semiconductor body; an island-shaped first region of a first conductivity type adjoining said first substantially flat surface; a second region of a second conductivity type underlying said first region; said first region forming with said underlying second region of the second conductivity type a first pn-junction extending substantially parallel to said first surface; a third region of said second conductivity type extending betwen said second region and said first surface; said first region being laterally bounded at least partly by a second pn-junction with an associated depletion zone which is formed between said first region and said third region; said second pn-junction having a lower breakdown voltage than said first pn-junction; a contact region adjoining said first surface and said first region; said contact region being bounded entirely by said first region; the doping concentration and the thickness of said first region being so small that upon applying a voltage in the reverse direction between said first and said second regions, the depletion zone, at least between said contact region and said third region extends from said first pn-junction up to said first surface at a voltage between said first and second regions which is lower than the breakdown voltage of said second pn-junction.

Claim 3

A semiconductor device as claimed in claim 1, wherein the distance L from said contact region to said second pn-junction, taken along said first surface, is greater than the distance over which said depletion zone associated with said second pn-junction extends along said first surface at the breakdown voltage of said second pn-junction.

Claim 4

A semiconductor device as claimed in claim 2, wherein said doping concentration N in atoms/cm 3 and the thickness d in cm of the island-shaped first region satisfy the condition ##EQU14## wherein ε is the relative dielectric constant and E the critical field strength in volt/cm which avalanche multiplication occurs in said semiconductor material of said first region, L is the distance in cm from said contact region up to said second pn junction, and V B is the unidimensionally computed value of the breakdown voltage of the first pn junction in volts.

Claim 5

A semiconductor device as claimed in claim 3, wherein N.d is substantially equal to 3.0·10 5 εE, and L≧1.4·10 -5 ·V B .

Claim 6

A semiconductor device as claimed in claim 1 wherein said doping concentration of at least the portion of said second region adjacent said first region is lower than that of said first region.

Claim 7

A semiconductor device as claimed in claim 1 wherein said second region has such a thickness that at the breakdown voltage of said first pn junction the depletion zone extends in said second region over a distance smaller than the thickness of said region.

Claim 8

A semiconductor device as claimed in claim 1 wherein said first region is formed by an epitaxial layer of said first conductivity type provided on said second region.

Claim 9

A semiconductor device as claimed in claim 1 wherein said first region is bounded laterally entirely by said second pn junction.

Claim 10

A semiconductor device as claimed in claim 1 wherein said island-shaped first region forms one of the collector and base zones of said bipolar high-voltage transistor and said contact region is a fourth semiconductor region of said first conductivity type having a higher doping concentration than said first region and being surrounded entirely by said first region.

Claim 11

A semiconductor device as claimed in claim 9 wherein: a surface-adjoining emitter zone of said second conductivity type fully surrounded by said fourth region is provided in said fourth region; said first region and said fourth region together constituting the base zone; and said second region constituting the collector zone of said transistor.

Claim 12

A semiconductor device as claimed in claim 10, wherein: said first region forms part of a first epitaxial layer of said first conductivity type and is separated from the remaining part of said first epitaxial layer by said third region; said second region is an island-shaped part of second epitaxial layer of said second conductivity type which is provided on a substrate of said first conductivity type; said island-shaped part being separated from the remaining part of said second epitaxial later by an isolation zone of said first conductivity type not adjoining said first and third regions and extending from said first epitaxial layer down to said substrate.

Claim 13

A semiconductor device as claimed in claim 10, wherein: said second region adjoins an underlying further region of said first conductivity type; said further region together with said second region, said first region, said fourth region, and said zone of said second conductivity type provided therein forms a thyristor.

Claim 14

A semiconductor device as claimed in claim 12, wherein said further region is connected to said first surface by a highly doped zone of said first conductivity type not adjoining said first and said third regions.

Claim 15

A semiconductor device as claimed in claim 12, wherein said second region is a semiconductor layer of said second conductivity type on which a combination of said first, third and fourth regions is provided on both sides, a surface zone of said second conductivity type being embedded on at least one side in said fourth region.

Claim 16

A semiconductor device as claimed in claim 9, wherein a base zone of said second conductivity type and therein an emitter zone of said first conductivity type are provided in said first region, said first and said fourth regions constituting together the collector zone of said transistor.

Claim 17

A semiconductor device as claimed in claim 15, wherein said base zone adjoins and merges into said third region.

Claim 18

A semiconductor device with a semiconductor body having a substantially flat surface, including at least one field effect transistor having a source electrode and a drain electrode, a channel region between said source and drain electrodes, and a gate electrode adjoining said channel region to influence, by means of a gate voltage applied to the gate electrode, a depletion zone for controlling a flow of charge carriers between the source and drain electrodes, said field effect transistor comprising: a layer-shaped first region of a first conductivity type; an underlying second region of a second conductivity type; said first region and said second region forming a first pn junction extending substantially parallel to said surface; a third region of said conductivity type adjoining said first region; an island-shaped portion of said first region being bounded at least in the operating condition laterally at least partly by a second pn junction with an associated depletion zone formed between said first region and said third region of the second conductivity type adjoining said first region; said second pn junction having a lower breakdown voltage than said first pn junction, at least the gate electrode adjoining the island-shaped region portion; the doping concentration and the thickness of said first region being so small that in the presence of a voltage in the reverse direction between said second region and a contact region of said field effect transistor belonging to the source, drain and gate electrodes and forming a non-rectifying contact with said island-shaped region portion, the depletion zone, at least between said contact region and said second pn junction, extends from said first pn junction throughout the thickness of said island-shaped region portion at a voltage which is lower than the breakdown voltage of said second pn junction.

Claim 19

A semiconductor device with a semiconductor body having a substantially flat surface, including at least one field effect transistor having a source electrode and a drain electrode, a channel region between said source and drain electrodes, and a gate electrode adjoining said channel region to influence, by means of a gate voltage applied to the gate electrode, a depletion zone for controlling a flow of charge carriers between the source and drain electrodes, said field effect transistor comprising: a layer-shaped first region of a first conductivity type; an underlying second region of a second conductivity type; said first region and said second region forming a first pn junction extending substantially parallel to said surface; a third region of said conductivity type adjoining said first region; an island-shaped portion of said first region being bounded at least in the operating condition laterally at least partly by a second pn junction with an associated depletion zone formed between said first region and said third region of the second conductivity type adjoining said first region; said second pn junction having a lower breakdown voltage than said first pn junction, at least the gate electrode adjoining the island-shaped region portion; the doping concentration and the thickness of said first region being so small that in the presence of a voltage in the reverse direction between said second region and a contact region of said field effect transistor belonging to the source, drain and gate electrodes and forming a non-rectifying contact with said island-shaped region portion, the depletion zone, at least between said contact region and said second pn junction, extends from said first pn junction throughout the thickness of said island-shaped region portion at a voltage which is lower than the breakdown voltage of said second pn junction.

Claim 20

A semiconductor device as claimed in claim 17, wherein the distance L from the said contact region to said second pn junction, taken along the surface, is greater than the distance over which the depletion zone associated with said second pn junction extends along the surface at the breakdown voltage of said second pn junction.

Claim 21

A semiconductor device as claimed in claim 18, wherein said doping cncentration N in atoms/cm 3 and the thickness d in cm of said island-shaped region portion satisfy the condition ##EQU15## where ε is the relative dielectric constant and E the critical field strength in volt/cm at which avalanche multiplication occurs in said semiconductor material of said first region, L is the distance in cm from said contact region up to said second pn junction, and V B is the unidimensionally computed value of the breakdown voltage of said first pn junction in Volts.

Claim 22

A semiconductor device as claimed in claim 19, wherein N.d is substantially equal to 3.0·10 5 εE, and L≧1.4·10 -5 ·V B .

Claim 23

A semiconductor device as claimed in claim 17 wherein said doping concentration of at least the portion of said second region adjacent said first region is lower than that of said first region.

Claim 24

A semiconductor device as claimed in claim 17 wherein said second region has a thickness such that at the breakdown voltage of said first pn junction the depletion zone extends in said second region over a distance less than the thickness of said region.

Claim 25

A semiconductor device as claimed in claim 17 wherein said first region is formed by an epitaxial layer of said first conductivity type provided on said second region.

Claim 26

A semiconductor device as claimed in claim 17 wherein said island-shaped part of said first region is bounded laterally entirely by said second pn junction.

Claim 27

A semiconductor device as claimed in claim 17 wherein said gate electrode comprises a semiconductor gate electrode zone which forms a pn junction wth the adjoining part of said channel region.

Claim 28

A semiconductor device as claimed in claim 17 wherein said gate electrode comprises a metal layer which forms a rectifying metal-to-semiconductor junction (Schottky junction) with the adjoining part of said channel region.

Claim 29

A semiconductor device as claimed in claim 17 wherein said gate electrode comprises a conductive layer which is separated from the adjoining part of said channel region by an insulating layer.

Claim 30

A semiconductor device as claimed in claim 17 wherein said field effect transistor is of the lateral type, the source and drain electrodes on either side of said gate electrode forming non-rectifying contacts with said first region, said contact region being formed by the drain electrode.

Claim 31

A semiconductor device as claimed in claim 17 wherein said gate electrode is connected to said second region.

Claim 32

A semiconductor device as claimed in claim 28 wherein said drain electrode is surrounded substantially entirely by said gate electrode and that said gate electrode is surrounded substantially entirely by the source electrode.

Claim 33

A semiconductor device as claimed in claim 29, wherein: a semiconductor layer of said second conductivity type is present on said first region; the source and drain electrodes comprise electrode zones of said first conductivity type; the gate electrode comprises an electrode zone of the second conductivity type; and all said electrode zones extend throughout the thickness of said semiconductor layer down to said first region.

Claim 34

A semiconductor device as claimed in claim 29, wherein: said source electrode comprises a source zone of said first conductivity type which is not connected to an external voltage; a highly doped zone of said second conductivity type is present on the side of said source zone remote from the gate electrode and extends from said surface down to said second region and is situated so close to said source that the breakdown voltage between these two zones is considerably lower than that of said first pn junction; the drain electrode and said second region are connected to a voltage source which is connected in series with a load impedance and provides a reverse voltage across said first pn junction; and said gate electrode is connected to a voltage source which provides a variable reverse voltage between said gate electrode and said first region so that said island-shaped portion of said first region surrounded by said gate electrode and the associated depletion zone can be temporarily cut off electrically from the remaining part of said first region.

Claim 35

A semiconductor device as claimed in claim 17 wherein said field effect transistor is of the vertical type; the drain electrode forms a non-rectifying contact with said second region; the source electrode forms a rectifying contact with said first region; and said gate electrode comprises an electrode zone of said first conductivity type which surrounds at least one part of said first region associated with said channel region and forms said contact region.