Patent US4884121A successfully refreshed from Google Patents.
US4884121A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1987-05-13
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Granted: 1989-11-28
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Expires: 2007-05-13
Abstract
Abstract A semiconductor device comprises a semiconductor substrate having a convex portion and at least one conductive interconnection layer formed over the substrate. The interconnection layer has a contact region to be electrically connected. The convex portion of the substrate is formed in correspondence with the contact region, so that a step of the underlying layer for the interconnection layer is removed.
Inventors
- 👤 Tatsuya Ishii
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 21:14
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10D; H10D62/00; H10D62/10; H10D62/117; H10D64/00; H10D64/20
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
116 words
A semiconductor device comprising: a semiconductor substrate having a major surface, an active region within said substrate and a protruding portion of said active region having a substantially uniform cross section extending above said major surface; and a conductive interconnection layer formed over said semiconductor substrate; said interconnection layer having a contact region located above and electrically connected to said protruding portion of said active region for providing an electrical connection to said active region; and an interlayer insulating layer interposed between said major surface of said semiconductor substrate and said interconnection layer so that the height of said protruding portion is substantially equal to a thickness of said interlayer insulating layer at said protruding portion.
Claim 2
Dependent Claim
116 words
A semiconductor device comprising: a semiconductor substrate having a major surface, an active region within said substrate and a protruding portion of said active region having a substantially uniform cross section extending above said major surface; and a conductive interconnection layer formed over said semiconductor substrate; said interconnection layer having a contact region located above and electrically connected to said protruding portion of said active region for providing an electrical connection to said active region; and an interlayer insulating layer interposed between said major surface of said semiconductor substrate and said interconnection layer so that the height of said protruding portion is substantially equal to a thickness of said interlayer insulating layer at said protruding portion.
Claim 3
Dependent Claim
37 words
A semiconductor device in accordance with claim 1 wherein said protruding portion of said active region has a substantially planar upper contact surface which is in electrical contact with said contact region of said conductive interconnection layer.
Claim 4
Dependent Claim
24 words
A semiconductor device in accordance with claim 1 wherein said protruding portion of said subtrate forms an electrode and interconnection layer of a transistor.
Claim 5
Dependent Claim
19 words
A semiconductor device in accordance with claim 1 wherein said protruding portion of said active region forms a resistor.
Claim 6
Dependent Claim
172 words
A semiconductor device comprising: a semiconductor substrate having a protruding portion of substantially uniform cross section extending above a major surface of said substrate; a first interlayer insulating layer formed on said major surface of said semiconductor substrate and covering said protruding portion; a first metal interconnection layer formed on said first interlayer insulation layer, said first metal interconnection layer having a convex region formed on said protruding portion of said semiconductor substrate; a second interlayer insulating layer formed on said first metal interconnection layer in locations adjacent said convex region of said first metal interconnection layer, an upper surface of said second interlayer insulating layer formed substantially coplanar with an upper surface of said convex region of said first metal interconnection layer; and a second metal interconnection layer of substantially uniform thickness, formed on said second interlayer insulating layer and said first metal interconnection layer, said second interconnection layer having a contact region electrically connected to said first interconnection layer at a region above said protruding portion of said semiconductor substrate.
Claim 7
Dependent Claim
172 words
A semiconductor device comprising: a semiconductor substrate having a protruding portion of substantially uniform cross section extending above a major surface of said substrate; a first interlayer insulating layer formed on said major surface of said semiconductor substrate and covering said protruding portion; a first metal interconnection layer formed on said first interlayer insulation layer, said first metal interconnection layer having a convex region formed on said protruding portion of said semiconductor substrate; a second interlayer insulating layer formed on said first metal interconnection layer in locations adjacent said convex region of said first metal interconnection layer, an upper surface of said second interlayer insulating layer formed substantially coplanar with an upper surface of said convex region of said first metal interconnection layer; and a second metal interconnection layer of substantially uniform thickness, formed on said second interlayer insulating layer and said first metal interconnection layer, said second interconnection layer having a contact region electrically connected to said first interconnection layer at a region above said protruding portion of said semiconductor substrate.
Claim 8
Dependent Claim
33 words
A semiconductor device in accordance with claim 5 wherein said protruding region of said first metal interconnection layer has a substantially planar contact surface in electrical contact with said second metal interconnection layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-11-27 | 1993-05-29 | 1993-11-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-11-27 | 1997-05-29 | 1997-11-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-11-27 | 2001-05-29 | 2001-11-28 | $7700.00 | Window Closed / Lapsed |