Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
184 words
A pulse code modulation (PCM) recording and reproducing apparatus, comprising: means for sampling analog signals from N channels, N being an integer, at a predetermined sampling frequency; means for converting each sample into a digital signal of a specific number of bits Bi, Bi being a quantization bit number selectable from a plurality of quantization bit numbers Bi: i=1, . . . , k; k being an integer; means for assembling frames of PCM data each comprising S samples; means for assembling blocks of PCM data each comprising Tr tracks, each track corresponding to one frame; means for setting the number of bits per frame to a value TA such that TA=n×LCM (Bi, i=1, . . . , k)+m n: integer LCM(Bi,i=1, . . . , k): least common multiple of all values Bi for i=1, . . . , k m: an additional number of bits required for synchronization and control of said digital signals; and means for setting the number of samples per block to a value TB such that TB=N×S×Tr, wherein the ratio of TA to TB is a simple integer.
Claim 2
Dependent Claim
184 words
A pulse code modulation (PCM) recording and reproducing apparatus, comprising: means for sampling analog signals from N channels, N being an integer, at a predetermined sampling frequency; means for converting each sample into a digital signal of a specific number of bits Bi, Bi being a quantization bit number selectable from a plurality of quantization bit numbers Bi: i=1, . . . , k; k being an integer; means for assembling frames of PCM data each comprising S samples; means for assembling blocks of PCM data each comprising Tr tracks, each track corresponding to one frame; means for setting the number of bits per frame to a value TA such that TA=n×LCM (Bi, i=1, . . . , k)+m n: integer LCM(Bi,i=1, . . . , k): least common multiple of all values Bi for i=1, . . . , k m: an additional number of bits required for synchronization and control of said digital signals; and means for setting the number of samples per block to a value TB such that TB=N×S×Tr, wherein the ratio of TA to TB is a simple integer.
Claim 3
Dependent Claim
16 words
A PCM recording and reproducing apparatus as defined in claim 1, wherein k=2, B1=16, and B2=20.
Claim 4
Dependent Claim
29 words
A PCM recording and reproducing apparatus as defined in claim 1, wherein N=2, Tr=6, k=2, B1=16, B2=20, n=4, m=40, and the number of bits per frame TA is 360.
Claim 5
Dependent Claim
50 words
A PCM recording and reproducing apparatus as defined in claim 1, further including a single master clock oscillator for producing clock signals used by said means for sampling, means for converting, and means for assembling in the recording of digital signals of any of said plurality of quantization bit numbers.
Claim 6
Dependent Claim
159 words
A pulse code modulation (PCM) recording and reproducing apparatus, comprising: means for sampling analog signals at a predetermined frequency and converting said samples into digital signals of predetermined number of bits; means for dividing said digitized samples into even and odd numbered data; means for delaying said odd numbered data by a predetermined delay period; encoding means for generating error correction inspection data by encoding said even and delayed odd numbered data; data interleaving means for recording data on a plurality of tracks of a recording medium, including means for arranging said even numbered data, delayed odd numbered data and inspection data dividedly into separate tracks such that said even numbered data is recorded first, a first portion of said inspection data is recorded second, said delayed odd numbered data is recorded third and the remaining portion of said inspection data is recorded fourth, thereby enabling said recording medium to be edited with a relatively long period of cross-fade.
Claim 7
Dependent Claim
159 words
A pulse code modulation (PCM) recording and reproducing apparatus, comprising: means for sampling analog signals at a predetermined frequency and converting said samples into digital signals of predetermined number of bits; means for dividing said digitized samples into even and odd numbered data; means for delaying said odd numbered data by a predetermined delay period; encoding means for generating error correction inspection data by encoding said even and delayed odd numbered data; data interleaving means for recording data on a plurality of tracks of a recording medium, including means for arranging said even numbered data, delayed odd numbered data and inspection data dividedly into separate tracks such that said even numbered data is recorded first, a first portion of said inspection data is recorded second, said delayed odd numbered data is recorded third and the remaining portion of said inspection data is recorded fourth, thereby enabling said recording medium to be edited with a relatively long period of cross-fade.
Claim 8
Dependent Claim
101 words
An encoder circuit for a pulse code modulation (PCM) recording and reproducing apparatus, comprising: means for encoding PCM data on N channels which is quantized into samples of Qi bits each, Qi being a variable quantization bit number selectable from at least two quantization bit numbers Qi, i=1, 2, on a Galois field (GF) of (2 l ), l being an integer constant; and a data division circuit for dividing a sequence of Qi×N bits of PCM data into M i symbols of l bits each, wherein ##EQU3## said means for encoding conducting an encoding operation on each 1 bit symbol.
Claim 9
Dependent Claim
101 words
An encoder circuit for a pulse code modulation (PCM) recording and reproducing apparatus, comprising: means for encoding PCM data on N channels which is quantized into samples of Qi bits each, Qi being a variable quantization bit number selectable from at least two quantization bit numbers Qi, i=1, 2, on a Galois field (GF) of (2 l ), l being an integer constant; and a data division circuit for dividing a sequence of Qi×N bits of PCM data into M i symbols of l bits each, wherein ##EQU3## said means for encoding conducting an encoding operation on each 1 bit symbol.
Claim 10
Dependent Claim
14 words
An encoder circuit as defined in claim 6, wherein Q1=20, N=2, l=8 and M1=5.
Claim 11
Dependent Claim
14 words
An encoder circuit as defined in claim 6, wherein Q2=16, N=2, l=8 and M2=4.