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US4868619A Expired / Lapsed US ⏱️ 0.0 years remaining

Single transistor electrically programmable memory device and method

Assignee: Advanced Micro Devices Inc
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Filing: 1986-08-14
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Granted: 1989-09-19
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Expires: 2006-08-14
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Abstract

Abstract An electrically erasable programmable memory device which is programmable in the manner of an EPROM and erasable in the manner of an EEPROM. A dielectric layer between the control gate and the floating gate is provided having a high dielectric constant. A thin, uniform gate dielectric layer is provided which demonstrates minimal trapping. Finally, an asymmetrical source/drain junction is provided wherein the source includes a shallow portion and a deeper portion, which deeper portion defines the overlap between the source and the floating gate. In the preferred embodiment the dielectric between the control gate and the floating gate comprises tantalum pentoxide, the thin dielectric layer comprises oxynitride, and the deep diffusion portion of the source comprises phosphorous.

Inventors

  • 👤 Satyen Mukherjee
  • 👤 Thomas Chang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 21:09
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; G; G11; G11C; G11C16/00; G11C16/02; G11C16/04; G11C16/0408; G11C16/0416; G11C16/06; G11C16/10; G11C16/14; G11C16/16; H10B; H10B69/00; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D64/00; H10D64/01; H10D64/031; H10D64/035; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D64/693; H10P; H10P95/00

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 144 words
An electrically erasable programmable memory device comprising a body of single crystalline semiconductive material of a first conductivity type having a source and a drain; a first layer of insulating material on said body; a floating gate on said first layer of insulating material; a second layer of insulating material on said floating gate; a gate over said second layer of insulating material; and wherein said source is formed of a deep region of a first material and a shallower region of the first material and a second material, and the drain is formed of a shallow region of the second material; and further wherein the first material is selected to optimize capacitive coupling between the floating gate and the source, and the first and second materials are of a second conductivity type which is different from the first conductivity type of said body.
Claim 2
Dependent Claim 144 words
An electrically erasable programmable memory device comprising a body of single crystalline semiconductive material of a first conductivity type having a source and a drain; a first layer of insulating material on said body; a floating gate on said first layer of insulating material; a second layer of insulating material on said floating gate; a gate over said second layer of insulating material; and wherein said source is formed of a deep region of a first material and a shallower region of the first material and a second material, and the drain is formed of a shallow region of the second material; and further wherein the first material is selected to optimize capacitive coupling between the floating gate and the source, and the first and second materials are of a second conductivity type which is different from the first conductivity type of said body.
Claim 3
Dependent Claim 24 words
The device of claim 1 wherein the second layer of insulating material comprises a layer of thermal oxide and a layer of tantalum pentoxide.
Claim 4
Dependent Claim 14 words
The device of claim 1 wherein the first layer of insulating material comprises oxynitride.
Claim 5
Dependent Claim 17 words
The device of claim 2 wherein the first layer has a thickness between 100 and 200 angstroms.
Claim 6
Dependent Claim 16 words
The device of claim 2 wherein the floating gate comprises a material having small grain size.
Claim 7
Dependent Claim 17 words
The device of claim 1 wherein the second material is arsenic and the first material is phosphorous.
Claim 8
Dependent Claim 29 words
The device of claim 1 wherein the floating gate has symmetrical cross section relative to an axis normal to the body and which is uniformly spaced from the body.
Claim 9
Dependent Claim 18 words
The device of claim 7 wherein the gate has a symmetrical cross section relative to the normal axis.
Claim 10
Dependent Claim 18 words
The device of claim 2 wherein the layer of thermal oxide has a thickness of approximately 150 angstroms.
Claim 11
Dependent Claim 16 words
The device of claim 2 wherein the layer of tantalum pentoxide is approximately 500 angstroms thick.
Claim 12
Dependent Claim 14 words
The device of claim 2 wherein the layer of tantalum pentoxide is oxide rich.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-09-18 1993-03-20 1993-09-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-09-18 1997-03-20 1997-09-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-09-18 2001-03-20 2001-09-19 $7700.00 Window Closed / Lapsed

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