Semiconductor memory device
Abstract
Abstract PURPOSE:To provide a ROM which has a high speed in storage and erasure, is not limited in the number of times of reading and can electrically perform the storage and erasure, by making thin a part of a gate insulating film on the drain side of a MOS transistor and effecting prescribed ion injection to produce a channel under the part of the gate insulating film. CONSTITUTION:A nonvolatile memory transistor comprises a source 1, a drain 2, a control gate 3 for the second polycrystalline silicon layer, a floating gate 4 for the first polycrystalline silicon layer, a depression part 5, insulators 6, 7 and a substrate 8. The depression part 5 is produced by injecting an impurity of the same type as the source and the drain while using a mask constituting a thin part of a gate insulating film under the floating gate and has a heightened dielectric strength. When the drain on the side of the thin gate is set at the ground potential and a positive voltage is applied to the control gate, the threshold value of the memory trnsistor rises. When the control gate is set at the ground potential and a positive voltage is applied to the drain, the threshold value falls. These phenomena are utilized to perform storage and erasure.
Inventors
- 👤 Michitoku Kamatani
Bibliographic Details
Claims Analysis
Total Claims: 0References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
Maintenance schedule is calculated for granted US utility patents.