Patent US4866490A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4866490A Expired / Lapsed US ⏱️ 0.0 years remaining

Field effect device maintaining a high speed operation in a high voltage operation

Assignee: NEC Corp
•
Filing: 1987-09-28
•
Granted: 1989-09-12
•
Expires: 2007-09-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A field effect transistor comprises a gate electrode applied with a gate voltage, a channel forming region forming a channel in response to the gate voltage, and source and drain regions formed on both sides of the channel forming region, respectively, the channel forming region being made of a semiconductor material having an electron affinity which decreases as the distance from one surface thereof increases. The channel is formed at the surface of the channel forming region. An additional semiconductor material having an electron affinity lower than the electron affinity at the surface of the channel forming region may be interposed between the gate electrode and the channel forming region.

Inventors

  • 👤 Tomohiro Itoh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 19:55
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732; H10D30/60; H10D30/751; H10D30/80; H10D30/801; H10D62/80; H10D62/82; H10D62/824

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 167 words
A field effect transistor comprising: a gate electrode applied with a gate voltage; an impurity doped semiconductor region formed under and in contact with said gate electrode, said impurity doped semiconductor region being made of a semiconductor having a first electron affinity; a channel-forming semiconductor region in contact with said impurity doped semiconductor region under said gate electrode to form an electron channel, said channel-forming semiconductor region primarily being a mixture of first and second semiconductor materials, said first semiconductor material having a second electron affinity higher than said first electron affinity, said second semiconductor material having a third electron affinity lower than said second electron affinity, the mixing ratio of said first semiconductor material in said channel-forming semiconductor region continuously changing to decrease with distance from an interface with said impurity doped semiconductor region, said electron channel being formed in said channel-forming semiconductor region at a portion where said mixing ratio continuously changes, and conductivity of said electron channel being controlled by said gate voltage; and
Claim 2
Dependent Claim 167 words
A field effect transistor comprising: a gate electrode applied with a gate voltage; an impurity doped semiconductor region formed under and in contact with said gate electrode, said impurity doped semiconductor region being made of a semiconductor having a first electron affinity; a channel-forming semiconductor region in contact with said impurity doped semiconductor region under said gate electrode to form an electron channel, said channel-forming semiconductor region primarily being a mixture of first and second semiconductor materials, said first semiconductor material having a second electron affinity higher than said first electron affinity, said second semiconductor material having a third electron affinity lower than said second electron affinity, the mixing ratio of said first semiconductor material in said channel-forming semiconductor region continuously changing to decrease with distance from an interface with said impurity doped semiconductor region, said electron channel being formed in said channel-forming semiconductor region at a portion where said mixing ratio continuously changes, and conductivity of said electron channel being controlled by said gate voltage; and
Claim 3
Dependent Claim 25 words
A field effect transistor as claimed in claim 1, wherein said gate electrode contacts said impurity doped semiconductor region to form a Schottky barrier junction.
Claim 4
Dependent Claim 38 words
A field effect transistor as claimed in claim 2, wherein said first semiconductor material is selected from a group of GaAs and GaP, and said second semiconductor material is selected from a group of AlAs, InP and InAs.
Claim 5
Dependent Claim 23 words
A field effect transistor as claimed in claim 3, wherein said impurity doped semiconductor region is made of AlGaAs doped with donor impurities.
Claim 6
Dependent Claim 54 words
A field effect transistor as claimed in claim 3, wherein the mixing ratio of said second semiconductor material continuously changes and increases with depth from zero at said interface and the mixing ratio of said first semiconductor material continuously changes and decreases with depth to zero at a bottom of said channel-forming semiconductor region.

References Cited (Backward Citations)

US4424525A Cited
JPS5893381A Cited
JPS59968A Cited
JPS5928383A Cited
US4740822A Cited
US4558337A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-09-11 1993-03-13 1993-09-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-09-11 1997-03-13 1997-09-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-09-11 2001-03-13 2001-09-12 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag