Semiconductor integrated circuit device

Claim 1

In an integrated circuit device formed on a P-type semiconductor substrate including an input PNP transistor having an emitter, a collector and a base; a first NPN transistor having an emitter, a collector and a base, the base of said first NPN transistor being connected to the emitter of said input PNP transistor by a lead wire; a Schottky barrier diode (SBD) having an anode and a cathode; and a second NPN transistor having an emitter, a collector and a base, the anode of said SBD being connected to the emitter of said first NPN transistor and to the base of said second NPN transistor, said SBD being the only SBD connected between the base of said input PNP transistor and said first and second NPN transistors, an isolation layer provided between the input PNP transistor and SBD: an improvement for reducing parasitic capacitance in the device and thereby improving switching speed thereof, wherein the base of said input PNP transistor is connected to the cathode of said SBD by a lead wire and lengths of the lead wires by which the emitter of said first NPN transistor and the base of said second NPN transistor are connected to the anode of said SBD are shorter than that of the lead wire between the base of said input PNP transistor and the cathode of said SBD.