Patent US4853628A successfully refreshed from Google Patents.
US4853628A
Expired / Lapsed
US
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Apparatus for measuring circuit parameters of a packaged semiconductor device
Assignee: Gazelle Microcircuits Inc
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Filing: 1987-09-10
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Granted: 1989-08-01
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Expires: 2007-09-10
Abstract
Abstract A semiconductor device includes as part of the integrated circuit thereof a test structure which allows testing of the semiconductor device through the device pins, to allow adjustment of various parameters of the circuit if desired for obtainment of optimum performance, and with the circuit being operable under normal conditions without degradation in relation to its optimum design situation.
Inventors
- 👤 Gary R. Gouldsberry
- 👤 Mark E. Fitzpatrick
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:10
CPC Classifications
H; H10; H10P; H10P74/00; H10P74/23; H10P74/232; G; G01; G01R; G01R31/00; G01R31/26; G01R31/2644; G01R31/27; G01R31/275; G01R31/28; G01R31/317; G01R31/3181; G01R31/3185; G06; G06F; G06F11/00; G06F11/006
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
138 words
In a semiconductor device having a circuited portion and a plurality of pins, a test structure as part of said device and connected to a part of pins of the device, the test structure in use providing electrical information concerning the circuit portion, and further comprising means comprising a disconnectable link as part of said test structure for providing that the circuit portion operates without degradation in operation of the device, as compared to a device not including said test structure, wherein the test structure in use thereof is connected to the circuit portion, wherein the test structure further comprises a diode forward biased in the direction from the pin at higher potential during testing toward the pin at lower potential during testing, wherein the disconnectable link comprises a laser programmable fuse connected between the pair of pins.
Claim 2
Dependent Claim
138 words
In a semiconductor device having a circuited portion and a plurality of pins, a test structure as part of said device and connected to a part of pins of the device, the test structure in use providing electrical information concerning the circuit portion, and further comprising means comprising a disconnectable link as part of said test structure for providing that the circuit portion operates without degradation in operation of the device, as compared to a device not including said test structure, wherein the test structure in use thereof is connected to the circuit portion, wherein the test structure further comprises a diode forward biased in the direction from the pin at higher potential during testing toward the pin at lower potential during testing, wherein the disconnectable link comprises a laser programmable fuse connected between the pair of pins.
Claim 3
Dependent Claim
22 words
The semiconductor device of claim 1 wherein one of the pins is the voltage supply pin in the operation of the device.
Claim 4
Dependent Claim
201 words
In a semiconductor device including a circuit portion and a plurality of pins, a first test structure connected to a pair of pins, a second test structure connected to a pair of pins, each test structure in use providing electrical information concerning the circuit portion, at least one of the first pair of pins being different from one of the second pair of pins, the first test structure including load means between the first pair of pins, and a diode forward biased in the direction from the pin of the first pair of pins at higher potential during testing toward the pin of the first pair of pins at lower potential during testing, and a second test structure including a diode forward biased in the direction from the pin of the second pair of pins at higher potential during testing toward the pin of the second pair of pins at lower potential during testing, wherein the first test structure includes as a part thereof a disconnectable link connecting the first pair of pins, and wherein the second test structure includes as a part thereof a disconnectable link connecting the second pair of pins, whereby the disconnectable links are laser programmable fuses.
Claim 5
Dependent Claim
201 words
In a semiconductor device including a circuit portion and a plurality of pins, a first test structure connected to a pair of pins, a second test structure connected to a pair of pins, each test structure in use providing electrical information concerning the circuit portion, at least one of the first pair of pins being different from one of the second pair of pins, the first test structure including load means between the first pair of pins, and a diode forward biased in the direction from the pin of the first pair of pins at higher potential during testing toward the pin of the first pair of pins at lower potential during testing, and a second test structure including a diode forward biased in the direction from the pin of the second pair of pins at higher potential during testing toward the pin of the second pair of pins at lower potential during testing, wherein the first test structure includes as a part thereof a disconnectable link connecting the first pair of pins, and wherein the second test structure includes as a part thereof a disconnectable link connecting the second pair of pins, whereby the disconnectable links are laser programmable fuses.
Claim 6
Dependent Claim
87 words
In a semiconductor device having a circuit portion and a plurality of pins, a test structure as part of said device and connected to at least one pin of the device, the tested structure in use providing electrical information concerning the circuit portion, and further comprising means for providing that the circuit portion operates without degradation in operation of the device, as compared to a device not including said test structure, said means for providing that the circuit portion operates without degradation comprising a laser programmable fuse.
Claim 7
Dependent Claim
87 words
In a semiconductor device having a circuit portion and a plurality of pins, a test structure as part of said device and connected to at least one pin of the device, the tested structure in use providing electrical information concerning the circuit portion, and further comprising means for providing that the circuit portion operates without degradation in operation of the device, as compared to a device not including said test structure, said means for providing that the circuit portion operates without degradation comprising a laser programmable fuse.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-07-31 | 1993-01-30 | 1993-08-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-07-31 | 1997-01-30 | 1997-08-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-07-31 | 2001-01-30 | 2001-08-01 | $7700.00 | Window Closed / Lapsed |