Patent US4851910A successfully refreshed from Google Patents.
US4851910A
Expired / Lapsed
US
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Synchronizing pulse signal generation device
Assignee: Canon Inc
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Filing: 1987-09-17
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Granted: 1989-07-25
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Expires: 2007-09-17
Abstract
Abstract A synchronizing pulse signal generation device separates horizontal and vertical synchronizing signals from a video signal; generates a clock signal which is phase locked relative to the phase of the horizontal synchronizing signal; and generates, by using the clock signal, a synchronizing pulse signal which is phase locked relative to the vertical and horizontal synchronizing signals.
Inventors
- 👤 Hisashi Kawai
- 👤 Makoto Masunaga
- 👤 Tuguhide Sakata
- 👤 Masahiro Takei
- 👤 Kenichi Nagasawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 06:16
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/76; H04N5/91; H04N5/92; H03; H03L; H03L7/00; H03L7/06; H04N5/04; H04N5/06; H04N5/12; H04N5/126; H04N5/93; H04N5/932
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
200 words
A synchronizing pulse signal generating device comprising: (a) phase comparison means which is arranged to generate a phase error signal at a level corresponding to a phase difference between two input signals; (b) supply means for supplying a periodic signal to said phase comparison means as one of the input signals of said comparison means; (c) sample-and-hold means for sampling said phase error signal according to said periodic signal; (d) control means arranged to output said phase error signal outputted from said sample-and-hold means during a period when said periodic signal is being supplied to said phase comparison means by said supply means and to output a control signal having a predetermined constant voltage level during a period other than the above-mentioned period; (e) a variable frequency osicallator having an oscillator frequency controlled on the basis of said phase error signal or the control signal outputted from said control means; and (f) means for generating, by using the oscillator output of said variable frequency oscillator, a first pulse signal of a period equal to that of said periodic signal, said first pulse signal being supplied to said phase comparison means as the other input signal of said phase comparison means.
Claim 2
Dependent Claim
200 words
A synchronizing pulse signal generating device comprising: (a) phase comparison means which is arranged to generate a phase error signal at a level corresponding to a phase difference between two input signals; (b) supply means for supplying a periodic signal to said phase comparison means as one of the input signals of said comparison means; (c) sample-and-hold means for sampling said phase error signal according to said periodic signal; (d) control means arranged to output said phase error signal outputted from said sample-and-hold means during a period when said periodic signal is being supplied to said phase comparison means by said supply means and to output a control signal having a predetermined constant voltage level during a period other than the above-mentioned period; (e) a variable frequency osicallator having an oscillator frequency controlled on the basis of said phase error signal or the control signal outputted from said control means; and (f) means for generating, by using the oscillator output of said variable frequency oscillator, a first pulse signal of a period equal to that of said periodic signal, said first pulse signal being supplied to said phase comparison means as the other input signal of said phase comparison means.
Claim 3
Dependent Claim
56 words
A device according to claim 1, wherein said periodic signal is a pulse signal and said phase comparison means includes a phase difference detecting circuit which generates, for every period of said periodic signal, a phase difference detection signal at a level corresponding to a phase difference between said periodic signal and said first pulse signal.
Claim 4
Dependent Claim
162 words
A synchronizing pulse signal generating device, comprising: (a) phase comparison means which is arranged to generate a phase error signal at a level corresponding to a phase difference between two input signals; (b) a variable frequency oscillator which has the oscillation frequency thereof controlled on the basis of said phase error signal; (c) supply means for supplying a periodic signal to said phase comparison means as one of the input signals for said phase comparison means; (d) means for generating a first pulse signal of a period equal to that of said periodic signal by using the oscillation output of said variable frequency oscillator; (e) variable delay means consisting of a plurality of series connected delay circuits, and arranged to delay said first pulse signal and to output the same; and (f) selection means for selectively supplying the output signals of said plurality of delay circuits of said variable delay means to said phase comparison means as the other input signal thereof.
Claim 5
Dependent Claim
162 words
A synchronizing pulse signal generating device, comprising: (a) phase comparison means which is arranged to generate a phase error signal at a level corresponding to a phase difference between two input signals; (b) a variable frequency oscillator which has the oscillation frequency thereof controlled on the basis of said phase error signal; (c) supply means for supplying a periodic signal to said phase comparison means as one of the input signals for said phase comparison means; (d) means for generating a first pulse signal of a period equal to that of said periodic signal by using the oscillation output of said variable frequency oscillator; (e) variable delay means consisting of a plurality of series connected delay circuits, and arranged to delay said first pulse signal and to output the same; and (f) selection means for selectively supplying the output signals of said plurality of delay circuits of said variable delay means to said phase comparison means as the other input signal thereof.
Claim 6
Dependent Claim
26 words
A device according to claim 3, wherein said plurality of delay dircuits are arranged to be driven by clock pulses produced from said variable frequency oscillator.
Claim 7
Dependent Claim
15 words
A device according to claim 4, wherein said plurality of delay circuits respectively include flip-flops.
Claim 8
Dependent Claim
32 words
A device according to claim 3, wherein said variable delay means includes at least (2 n-1 +1) number of the delay circuits and a circuit arranged to receive data of n bits.
Claim 9
Dependent Claim
14 words
A device according to claim 6, wherein said selection means consists of logic gates.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-07-24 | 1993-01-23 | 1993-07-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-07-24 | 1997-01-23 | 1997-07-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-07-24 | 2001-01-23 | 2001-07-25 | $7700.00 | Window Closed / Lapsed |