US4565975A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Synchronization of pull-in oscillators in the transmission of digital signals
Assignee: Siemens AG
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Filing: 1984-02-27
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Granted: 1986-01-21
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Expires: 2004-02-27
Abstract
Abstract Transmission lines for digital signals may include a large number--for example, several hundred--of intermediate generators. In this case, telemetering units are provided at the end points and at intermediate points, by means of which the digital telemetry signals are generated and sent over the transmission lines together with the digital information signals. In the event of interference, a problem arises, due to the fact that the telemetry signal that is needed to identify the interference is only available after a comparatively long time. Therefore, according to the invention, a method is recommended for the initial synchronization, at bit rate, of the pulse generators which generate the bit pulse in the telemetering units. The pulse generation is accomplished with a phase-control loop which generates a signal pulse with a comparatively high frequency. This high frequency is broken down by a resettable frequency divider to the pulse frequency by setting the frequency divider with the first correct sync word recognition. This results in an intermediate synchronization.
Inventors
- 👤 Peter Gegner
- 👤 Friedemann Vollnhals
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 17:29
CPC Classifications
H; H04; H04L; H04L7/00; H04L7/04; H04L7/10; H04L7/0004; H04L7/08
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
320 words
A method for the synchronization of clock generators in the transmission of digital signals which contain clock information and periodically at least one synchronization word, where, from the digital signals, a first clock pulse signal phaselocked relative to these transmitted digital signals is generated, and therefrom, by means of a phase control loop containing a phase comparator and a voltage-controlled oscillator connected therewith, a second clock signal is generated by the fact that first, in the phase control loop, a third clock signal of a frequency corresponding to a multiple of the clock frequency of the transmitted digital signals is generated, and from the third clock signal by frequency division the second clock signal is formed, that, upon a disturbance which leads to a failure of the first clock signal, the operation of the phase control loop between the phase comparator and the voltage-controlled oscillator is interrupted, and that, after elimination of the disturbance, the phase control loop between phase comparator and voltage-controlled oscillator is again closed, characterized by the generation of the second clock signal by means of a resettable frequency divider, that, in normal operation, a means for monitoring the synchronization word of the transmitted digital signals is controlled by the second clock signal, that, in the case of a disturbance of the first clock signal or of the synchronization word, the control of the means for monitoring the synchronization word, in addition to the actuation of the phase control loop, is switched to the first clock signal, and that after elimination of the disturbance, in addition to the closing of the phase control loop with the first recognition of the synchronization word when the first clock signal is present, the delivery of clock pulses of the second clock signal is triggered by a resetting of the frequency divider, and the means for monitoring the synchronization word is again connected to and controlled by the second clock signal.
Claim 2
Independent Claim
320 words
A method for the synchronization of clock generators in the transmission of digital signals which contain clock information and periodically at least one synchronization word, where, from the digital signals, a first clock pulse signal phaselocked relative to these transmitted digital signals is generated, and therefrom, by means of a phase control loop containing a phase comparator and a voltage-controlled oscillator connected therewith, a second clock signal is generated by the fact that first, in the phase control loop, a third clock signal of a frequency corresponding to a multiple of the clock frequency of the transmitted digital signals is generated, and from the third clock signal by frequency division the second clock signal is formed, that, upon a disturbance which leads to a failure of the first clock signal, the operation of the phase control loop between the phase comparator and the voltage-controlled oscillator is interrupted, and that, after elimination of the disturbance, the phase control loop between phase comparator and voltage-controlled oscillator is again closed, characterized by the generation of the second clock signal by means of a resettable frequency divider, that, in normal operation, a means for monitoring the synchronization word of the transmitted digital signals is controlled by the second clock signal, that, in the case of a disturbance of the first clock signal or of the synchronization word, the control of the means for monitoring the synchronization word, in addition to the actuation of the phase control loop, is switched to the first clock signal, and that after elimination of the disturbance, in addition to the closing of the phase control loop with the first recognition of the synchronization word when the first clock signal is present, the delivery of clock pulses of the second clock signal is triggered by a resetting of the frequency divider, and the means for monitoring the synchronization word is again connected to and controlled by the second clock signal.
Claim 3
Dependent Claim
41 words
The method of claim 1, further comprising a means for applying a reference signal to the input of the voltage-controlled oscillator when the phase-control loop is open so the frequency of the third clock pulse is kept to a nominal value.
References Cited (Backward Citations)
US4135166A
Cited
US4406919A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-01-20 | 1989-07-22 | 1990-01-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-01-20 | 1993-07-22 | 1994-01-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-01-20 | 1997-07-22 | 1998-01-21 | $7700.00 | Window Closed / Lapsed |