Unity-gain current-limiting circuit

Claim 2

An electronic circuit for preventing an output current flowing through an output line from exceeding a specified value of an input current flowing through an input line, characterized by: a main channel, including the output line and an intermediate line coupled to the input line by way of a first node at which a first nodal voltage is present, for providing a current path between the intermediate and output lines, the intermediate line carrying a current largely equal to the output current; a current source, coupled between a first voltage supply and a second node at which a second nodal voltage is present, for supplying a reference current; a reference channel for providing a current path between the second node and a second voltage supply; bypass means coupled to the first node for providing a current shunt away from the main channel; and control means coupled to the nodes for supplying the bypass means with a control signal that causes a portion of the input current to be diverted away from the intermediate line and through the bypass means when the input current achieves a prescribed relationship to the reference current, the diverted current portion progressively increasing as the input current increases such that the output current does not pass the specified value of the input current.

Claim 3

A circuit as in claim 1 characterized in that: the main channel comprises a first channel device that causes the output current to vary in a prescribed way as a function of the first nodal voltage and a first reference voltage; the reference channel comprises a second channel device that largely sets the second nodal voltage at a value dependent on the reference current and a second reference voltage; and the control signal switches between a pair of opposite states depending on the amount of difference between the nodal voltages.

Claim 4

A circuit as in claim 2 characterized in that the output current increases as the magnitude of the difference between the first nodal voltage and the first reference voltage increases.

Claim 5

A circuit as in claim 2 characterized in that generation of the control signal at a selected one of the states causes the bypass means to be disabled, substantially none of the input current flowing through the bypass means when it is disabled.

Claim 6

A circuit as in claim 2 characterized in that: the first channel device comprises a first amplifier having a first flow electrode coupled to the intermediate line, a second flow electrode coupled to the output line, and a control electrode responsive to the first reference voltage for controlling current flow between the flow electrodes of the first amplifier; and the second channel device comprises a second amplifier having a first flow electrode coupled to the second node, a second flow electrode coupled to the second voltage supply, and a control electrode responsive to the second reference voltage for controlling current flow between the flow electrodes of the second amplifier.

Claim 7

A circuit as in claim 5 characterized in that: the first channel device includes a first resistor coupled between the intermediate line and the first electrode of the first amplifier; and the second channel device includes a second resistor coupled between the second node and the first electrode of the second amplifier.

Claim 8

A circuit as in claim 6 characterized in that the first and second amplifiers respectively comprise first and second like-polarity bipolar transistors, each having an emitter, a collector, and a base respectively coupled to the first, second, and control electrodes of its amplifier.

Claim 9

A circuit as in claim 7 characterized in that: the reference voltages are substantially the same; and R 2 /R 1 is largely equal to A E1 /A E2 , where R 1 l and R 2 are the respective resistances of the first and second resistors, and A E1 and A E2 are the respective areas of the emitters of the first and second transistors.

Claim 10

A circuit as in claim 5 characterized in that the control means comprises a differential amplifier having an inverting input for receiving the first nodal voltage, a non-inverting input for receiving the second nodal voltage, and an output for supplying the control signal as an amplification of the difference between the nodal voltages.

Claim 11

A circuit as in claim 9 characterized in that the control means includes feedback means for providing positive feedback from the output of the differential amplifier to its non-inverting input.

Claim 12

A circuit as in claim 9 characterized in that the bypass means comprises a further amplifier having a first flow electrode coupled to the first node, a second flow electrode coupled to the second voltage supply, and a control electrode responsive to the control signal for controlling current flow between the flow electrodes of the further amplifier.

Claim 13

A circuit as in claim 11 characterized in that: the first channel device includes a first resistor coupled between the intermediate line and the first electrode of the first amplifier; and the second channel device includes a second resistor coupled between the second node and the first electrode of the second amplifier.

Claim 14

A circuit as in claim 12 characterized in that the first and second amplifiers respectively comprise first and second like-polarity bipolar transistors, each having an emitter, a collector, and a base respectively coupled to the first, second, and control electrodes of its amplifier.

Claim 15

A circuit as in claim 13 characterized in that the control means includes feedback means for providing positive feedback from the output of the differential amplifier to its non-inverting input.

Claim 16

A circuit as in claim 14 characterized in that: the reference voltages are substantially the same; and R 2 /R 1 is largely equal to A E1 /A E2 , where R 1 and R 2 are the respective resistances of the first and second resistors, and A E1 and A E2 are the respective areas of the emitters of the first and second transistors.

Claim 17

A circuit as in claim 15 characterized in that the transistors are NPN transistors.

Claim 18

A circuit as in claim 9 characterized in that the bypass means comprises a diode coupled between the first node and the output of the differential amplifier.

Claim 19

A circuit as in claim 17 characterized in that the diode is a base-emitter junction of a bipolar transistor having a collector coupled to the second voltage supply.

Claim 20

An electronic circuit for preventing an output current flowing through an output line from exceeding a specified value of an input current flowing through an input line, characterized by: a first amplifier having a first flow electrode coupled to an intermediate line, a second flow electrode coupled to the output line, and a control electrode responsive to a first reference voltage for regulating current transmission between the flow electrodes of the first amplifier, the intermediate line carrying an intermediate current largely equal to the output current, the input line being coupled to the intermediate line by way of a first node at which a first nodal voltage is present; a current source, coupled between a first voltage supply and a second node at which a second nodal voltage is present, for supplying a reference current; a second amplifier having a first flow electrode coupled to the second node, a second flow electrode coupled to a second voltage supply, and a control electrode responsive to a second reference voltage for regulating current transmission between the flow electrodes of the second amplifier, the amplifiers being like-configured; bypass means coupled to the first node for providing a current shunt away from the main channel; and control means coupled to the nodes for supplying the bypass means with a control signal that causes a portion of the input current to be diverted away from the intermediate line and through the bypass means when the input current achieves a prescribed relationship to the reference current, the diverted current portion progressively increasing as the input current increases such that the output current does not pass the specified value of the input current.

Claim 21

An electronic circuit for preventing an output current flowing through an output line from exceeding a specified value of an input current flowing through an input line, characterized by: a first amplifier having a first flow electrode coupled to an intermediate line, a second flow electrode coupled to the output line, and a control electrode responsive to a first reference voltage for regulating current transmission between the flow electrodes of the first amplifier, the intermediate line carrying an intermediate current largely equal to the output current, the input line being coupled to the intermediate line by way of a first node at which a first nodal voltage is present; a current source, coupled between a first voltage supply and a second node at which a second nodal voltage is present, for supplying a reference current; a second amplifier having a first flow electrode coupled to the second node, a second flow electrode coupled to a second voltage supply, and a control electrode responsive to a second reference voltage for regulating current transmission between the flow electrodes of the second amplifier, the amplifiers being like-configured; bypass means coupled to the first node for providing a current shunt away from the main channel; and control means coupled to the nodes for supplying the bypass means with a control signal that causes a portion of the input current to be diverted away from the intermediate line and through the bypass means when the input current achieves a prescribed relationship to the reference current, the diverted current portion progressively increasing as the input current increases such that the output current does not pass the specified value of the input current.

Claim 22

A circuit as in claim 19 characterized by: a first resistor coupled between the intermediate line and the first electrode of the first amplifier; and a second resistor coupled between the second node and the first electrode of the second amplifier.