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US4219744A Expired / Lapsed US ⏱️ 0.0 years remaining

DC-Coupled Schmitt trigger circuit with input impedance peaking for increasing switching speed

Assignee: HP Inc
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Filing: 1978-02-03
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Granted: 1980-08-26
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Expires: 1998-02-03
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Abstract

Abstract A compact, DC-coupled Schmitt trigger circuit is disclosed for providing fast switching in response to differential current signals from an input source such as an amplifier. The circuit includes first and second matched pairs of transistors disposed for performing switching and feedback functions, respectively, and for producing a voltage at an input or base of the first pair equal to the sum (AND function) of the source voltage and the voltage at an emitter of the feedback pair. In response to the applied current signals, the transistors of the second matched pair are always in a conducting state (and requires no extra time to turn on) regardless of the conducting state of either of the transistors of the first matched pair. The circuit includes first and second matched pairs of resistors coupled to selected ones of the transistors, the resistance values of which second matched pair of resistors are selected such that the input impedance of the circuit peaks at a selected high frequency of the applied current signal.

Inventors

  • 👤 II Charles E. Shinn

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 03:04
CPC Classifications
H; H03; H03K; H03K3/00; H03K3/02; H03K3/26; H03K3/28; H03K3/281; H03K3/286; H03K3/287

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 380 words
Schmitt trigger circuit responsive to differential input current signals, to a supply voltage from a voltage source and to a constant DC current from a DC current source, the circuit comprising: a first matched differential pair of transistor means disposed for performing a switching function, each transistor having a base, an emitter, and a collector, the emitters being coupled to each other and to the DC current source, and the bases being disposed for receiving the differential input current signals; a second matched pair of transistor means disposed for performing a feedback function and for always being in a conducting state in response to the input current signals regardless of the conducting state of the transistors of the first matched pair, each transistor having a base, an emitter, and a collector, the collectors of said second pair being coupled to each other and to the voltage supply, the base of one transistor of said second pair being coupled to the collector of one transistor of said first pair such that positive feedback occurs, and the base of the other transistor of said second pair being coupled to the collector of the other transistor of said first pair; a first matched pair of resistors, one being coupled between the base of the one transistor of said first pair and the emitter of the other transistor of said second pair, and the other resistor being coupled between the base of the other transistor of said first pair and the emitter of the one transistor of said second pair; a second matched pair of resistors, one end of each resistor being coupled to the voltage supply and each of the other ends being coupled to a different one of the bases of the second matched pair of transistors, the resistors of said second matched pair each having a resistance value selected so that input impedance of the circuit peaks at a selected high frequency of the applied current signal; and a matched pair of Schottky diodes and a matched pair of current sources, each of the Schottky diodes and each of the pair of current souces being coupled to an emitter of the first matched pair of transistors, the Schotty diodes being further coupled to each other and to the DC current source.
Claim 2
Dependent Claim 380 words
Schmitt trigger circuit responsive to differential input current signals, to a supply voltage from a voltage source and to a constant DC current from a DC current source, the circuit comprising: a first matched differential pair of transistor means disposed for performing a switching function, each transistor having a base, an emitter, and a collector, the emitters being coupled to each other and to the DC current source, and the bases being disposed for receiving the differential input current signals; a second matched pair of transistor means disposed for performing a feedback function and for always being in a conducting state in response to the input current signals regardless of the conducting state of the transistors of the first matched pair, each transistor having a base, an emitter, and a collector, the collectors of said second pair being coupled to each other and to the voltage supply, the base of one transistor of said second pair being coupled to the collector of one transistor of said first pair such that positive feedback occurs, and the base of the other transistor of said second pair being coupled to the collector of the other transistor of said first pair; a first matched pair of resistors, one being coupled between the base of the one transistor of said first pair and the emitter of the other transistor of said second pair, and the other resistor being coupled between the base of the other transistor of said first pair and the emitter of the one transistor of said second pair; a second matched pair of resistors, one end of each resistor being coupled to the voltage supply and each of the other ends being coupled to a different one of the bases of the second matched pair of transistors, the resistors of said second matched pair each having a resistance value selected so that input impedance of the circuit peaks at a selected high frequency of the applied current signal; and a matched pair of Schottky diodes and a matched pair of current sources, each of the Schottky diodes and each of the pair of current souces being coupled to an emitter of the first matched pair of transistors, the Schotty diodes being further coupled to each other and to the DC current source.

References Cited (Backward Citations)

US2840728A Cited
US3307047A Cited
US3617776A Cited
US3849675A Cited
US3979735A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1983-08-26 1984-02-25 1984-08-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1987-08-26 1988-02-25 1988-08-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1991-08-26 1992-02-25 1992-08-26 $7700.00 Window Closed / Lapsed

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