Isolation amplifier including precision voltage-to-duty-cycle converter and low ripple, high bandwidth charge balance demodulator

Claim 2

A modulator/demodulator circuit comprising in combination: (a) a modulator circuit including i. means for receiving an analog input current; ii. first switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; iii. first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the input current and the first current is positive or negative; means for producing a duty-cycle modulated signal on the first conductor having a first level if the output voltage exceeds a reference voltage sional that is synchronized with a noise signal; (b) means for coupling the first conductor second conductor; and (c) a demodulator including i. second switching means for producing a second current that is switched between positive and negative levels in response to the duty cycle modulated signal on the second conductor; ii. second integrating means for integrating the second current to produce an analog output signal that is accurately representative of the analog input current.

Claim 3

An isolation amplifier comprising in combination: (a) a modulator circuit including i. means for producing an analog input current in response to an analog input voltage; ii. first current switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; iii. first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the analog input current and the first current is positive or negative; iv. means for producing a duty-cycle-modulated digital signal on the first conductor having a first level if the output voltage of the first integrating circuit means exceeds a threshold voltage and a second level if the output voltage of the first integrating circuit means is less than another threshold voltage; (b) a non-galvanic isolation barrier having an input coupled to the first conductor and an output coupled to a second conductor; and (c) a demodulator including i. second current switching means for producing a second current that is switched between positive and negative levels in response to the duty cycle modulated digital signal on the second conductor; ii. second integrating circuit means for integrating the second current to produce an analog output voltage that is accurately representative of the analog input voltage, wherein the second integrating circuit means includes a first operational amplifier having a first input responsive to the second current, a second input coupled to a demodulator ground reference voltage, a first capacitor having a first terminal coupled to the first input of the first operational amplifier and a second terminal connected to an output of the second operational amplifier, a sample and hold circuit having an analog input coupled to the output of the first operational amplifier, an analog output conductor coupled to a first terminal of an output resistor, a second terminal of the output resistor being connected to the first input of the first operational amplifier, the analog output voltage being produced on the analog output conductor of the sample and hold circuit, the sample and hold circuit including a sample control input coupled to the second conductor.

Claim 4

An isolation amplifier comprising in combination: (a) a modulator circuit including i. means for producing an analog input current in response to an analog input voltage; ii. first current switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; iii. first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the analog input current and the first current is positive or negative; iv. means for producing a duty-cycle-modulated digital signal on the first conductor having a first level if the output voltage of the first integrating circuit means exceeds a threshold voltage and a second level if the output voltage of the first integrating circuit means is less than another threshold voltage; (b) a non-galvanic isolation barrier having an input coupled to the first conductor and an output coupled to a second conductor; and (c) a demodulator including i. second current switching means for producing a second current that is switched between positive and negative levels in response to the duty cycle modulated digital signal on the second conductor; ii. second integrating circuit means for integrating the second current to produce an analog output voltage that is accurately representative of the analog input voltage, wherein the second integrating circuit means includes a first operational amplifier having a first input responsive to the second current, a second input coupled to a demodulator ground reference voltage, a first capacitor having a first terminal coupled to the first input of the first operational amplifier and a second terminal connected to an output of the second operational amplifier, a sample and hold circuit having an analog input coupled to the output of the first operational amplifier, an analog output conductor coupled to a first terminal of an output resistor, a second terminal of the output resistor being connected to the first input of the first operational amplifier, the analog output voltage being produced on the analog output conductor of the sample and hold circuit, the sample and hold circuit including a sample control input coupled to the second conductor.

Claim 5

The isolation amplifier of claim 2 wherein the first integrating circuit means includes a second operational amplifier having a first input receiving the analog input current and connected to a first terminal of a second capacitor, a second terminal of the second capacitor being connected to an output of the second operational amplifier.

Claim 6

The isolation amplifier of claim 3 wherein the duty-cycle-modulated signal producing means includes a comparator having an output coupled to the first conductor, a first input coupled to the output of the second operational amplifier, and a second input receiving a reference voltage.

Claim 7

The isolation amplifier of claim 4 wherein the comparator is a hysteresis comparator.

Claim 8

The isolation amplifier of claim 5 wherein the reference voltage is a ground reference voltage.

Claim 9

The isolation amplifier of claim 5 wherein the reference voltage is synchronized to a periodic noise signal, the comparator responding to the reference signal to synchronize a carrier frequency of the modulator to the periodic noise signal to prevent the modulator from producing a low frequency beat signal.

Claim 10

The isolation amplifier of claim 4 wherein the reference voltage is a ground reference voltage.

Claim 11

The isolation amplifier of claim 4 wherein the first current switching means includes a first constant current source coupled to a first summing node, a second constant current source producing a substantially different current than the first constant current source, and means responsive to the duty-cycle-modulated digital signal for steering the current produced by the second constant current source to the first summing node to produce a value of the first current equal to the difference between the currents produced by the first and second constant current sources in response to a particular level of the duty-cycle-modulate digital signal.

Claim 12

The isolation amplifier of claim 9 including a second current switching means that includes a third constant current source coupled to a second summing node, a fourth constant current source producing a substantially different current than the third constant current source, and means responsive to the duty-cycle-modulated signal on the second conductor for steering the current produced by the fourth constant current source to the second summing node to produce value of the second current equal to the difference between the currents produced by the third and fourth constant current sources in response to the particular level of the duty-cycle-modulated digital signal.

Claim 13

The isolation amplifier of claim 10 wherein the ratio of the constant currents produced by the first and second constant current sources is equal to the ratio of the constant currents produced by the third and fourth constant current sources.

Claim 14

The isolation amplifier of claim 9 wherein the sample and hold circuit is a bucket brigade sample and hold circuit.

Claim 15

The isolation amplifier of claim 12 wherein the bucket brigade sample and hold circuit includes: (a) a first sample and hold circuit including i. a third operational amplifier having a first input receiving an analog input signal, and a first output, ii. a fourth operational amplifier having a first input and an output, iii. first switching means for coupling the first output of the third operational amplifier to the first input of the fourth operational amplifier in response to a first sample control signal; and (b) a second sample and hold circuit including i. a fifth operational amplifier having a first input coupled to the output of the fourth operational amplifier, and a first output, ii. a sixth operational amplifier having a first input and an output; iii. second switching means for coupling the first output of the fifth operational amplifier to the first input of the sixth operational amplifier in response to the first sample control signal.

Claim 16

The isolation amplifier of claim 13 wherein the bucket brigade sample and hold circuit includes means repsonsive to a first level of the first sample control signal for repeatedly performing the sequence of operations including (1) causing the first switching means to couple the first output of the third operational amplifier to the first input of the fourth operational amplifier to cause the analog input signal to be acquired by the forth operational amplifier and held on the output of the fourth operational amplifier, (2) causing the first switching means to then decouple the first output of the third operational amplifier from the first input of the fourth operational amplifier in response to a second level of the first sample control signal so that a first value of the analog input signal that is acquired immediately before the decoupling is held on the output of the fourth operational amplifier and the first input of the fifth operational amplifier, (3) causing the second switching means to couple the first output of the fifth operational amplifier to the first input of the sixth operational amplifier to cause the first value to be acquired by the sixth operational amplifier and held on the output of the sixth operational amplifier during the second level.

Claim 19

The method of claim 15 wherein step (d) includes comparing the output signal to the first and second threshold signals by means of a comparator circuit.

Claim 20

The method of claim 16 including applying the output signal to a first input of the comnparator circuit and applying a periodic noise signal to a second input of the comparator circuit, the method including operating the comparator to synchronize a carrier frequency of the moduylator to the periodic noise signal to avoid producing a low frequency beat signal.

Claim 23

A duty cycle modulator circuit comprising in combination: (a) means for receiving an analog input current; (b) first switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; (c) first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the analog input current and the first current is positive or negative; (d) means for producing a duty-cycle-modulated signal on the first conductor having a first level if the output voltage exceeds a reference voltage signal that is synchronized with a noise signal, whereby no low frequency beat signal is produced.

Claim 24

A duty cycle modulator circuit comprising in combination: (a) means for receiving an analog input current; (b) first switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; (c) first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the analog input current and the first current is positive or negative; (d) means for producing a duty-cycle-modulated signal on the first conductor having a first level if the output voltage exceeds a reference voltage signal that is synchronized with a noise signal, whereby no low frequency beat signal is produced.

Claim 25

The duty cycle modulator circuit of claim 19 including means for producing the analog input current in response to an analog input voltage.

Claim 26

The duty cycle modulator circuit of claim 20 wherein the analog input current producing means includes a first resistor having one terminal receiving the analog input voltage and another terminal coupled to a first summing node.

Claim 27

The duty cycle modulator circuit of claim 21 wherein the first integrating means includes a first operational amplifier having a first input coupled to the first summing node and a first terminal of a first capacitor, a second terminal of the first capacitor being connected to an output of the first operational amplifier, a second input of the operational amplifier being coupled to a first reference voltage conductor.

Claim 28

The duty cycle modulator circuit of claim 22 wherein the duty-cycle-modulated signal producing means includes a comparator having a first input coupled to the output of the first operational amplifier, a second input coupled to receive the reference voltage signal, and an output coupled to the first conductor.

Claim 29

A demodulator circuit comprising in combination: (a) first circuit means for receiving a digital input signal that is modulated to represent an analog input signal and producing in response thereto a switch control signal including a sequence of pulses; (b) a first current source; (c) switching means for electrically coupling the first current source to a first summing node during the pulses of the switch control signal; (d) integrating circuit means having a first input coupled to the first summing node and an output for integrating a current flowing from the first summing node to the first input; (e) a sample and hold circuit having an input coupled to the output of the integrating circuit means and an output, and a sample control input responsive to the digital input signal, wherein the sample and hold circuit includes i. a first sample and hold circuit having an input coupled to the output of the intergrating circuit means, and ii. a second sample and hold circuit having an input coupled to an output of the first sample and hold circuit, the second sample and hold circuit having an output producing the analog output signal; (f) a feedback resistor coupled between the output of the sample and hold circuit and the first summing node, the output of the sample and hold circuit means producing an analog output signal that accurately represents the analog input signal, the sample and hold circuit operating to substantially reduce ripple voltage on the analog output signal.

Claim 30

A demodulator circuit comprising in combination: (a) first circuit means for receiving a digital input signal that is modulated to represent an analog input signal and producing in response thereto a switch control signal including a sequence of pulses; (b) a first current source; (c) switching means for electrically coupling the first current source to a first summing node during the pulses of the switch control signal; (d) integrating circuit means having a first input coupled to the first summing node and an output for integrating a current flowing from the first summing node to the first input; (e) a sample and hold circuit having an input coupled to the output of the integrating circuit means and an output, and a sample control input responsive to the digital input signal, wherein the sample and hold circuit includes i. a first sample and hold circuit having an input coupled to the output of the intergrating circuit means, and ii. a second sample and hold circuit having an input coupled to an output of the first sample and hold circuit, the second sample and hold circuit having an output producing the analog output signal; (f) a feedback resistor coupled between the output of the sample and hold circuit and the first summing node, the output of the sample and hold circuit means producing an analog output signal that accurately represents the analog input signal, the sample and hold circuit operating to substantially reduce ripple voltage on the analog output signal.

Claim 31

The demodulator circuit of claim 24 wherein the integrating circuit means inlcudes an operational amplifier having a first input coupled to the first summing node and a second input receiving a reference voltage, and an output coupled to the output of the integrating circuit means, and a capacitor coupled between the first input and the output of the operational amplifier.

Claim 32

The demodulator circuit of claim 24 wherein the first sample and hold circuit inlcudes (i) a first operational amplifier having a first input receiving an analog input signal, and a first output, (ii) a second operational amplifier having a first input and an output, and (iii) first switching means for coupling the first output of the first operational amplifier to the first input of the second operational amplifier in response to a first sample control signal, and wherein the second sample and hold circuit includes (i) a third operational amplifier having a first input coupled to the output of the sample operational amplifier, and a first output, (ii) a fourth operatioanl amplifier having a first input and an output, and (iii) second switching means for coupling the first output of the third operational amplifier to the first input of the fourth operational amplifier in response to the first sample control signal.

Claim 33

The duty cycle demodulator of claim 26 wherein the sample and hold circuit includes means responsive to a first level of the first sample control signal for repeatedly performing a sequence of operations including (1) causing the first switching means to couple the first output of the first operational amplifier to the first input of the second operational amplifier to cause the analog input signal to be held on the output of the second operational amplifier, (2) causing the first switching means to then decouple the first output of the first operational amplifier from the first input of the second operational amplifier in response to a second level of the first sample control signal so that a first value of the analog input signal that is acquired immediately before the decoupling is held on the output of the second operational amplifier and the first input of the third operational amplifier, (3) causing the second switching means to couple the first output of the third operational amplifier to the first input of the fourth operational amplifier to cause the first value to be acquired and held on the output of the fourth operational amlifier during the second level.

Claim 34

A sample and hold circuit comprising in combination: (a) a first sample and hold circuit including i. a first operational amplifier having a first input receiving an analog input signal, and a first output, ii. a second operational amplifier having a first input and an output, (b) a second sample and hold circuit including i. a third operational amplifier having a first input coupled to the output of the second operational amplifier, and a first output, ii. a fourth operational amplifier having a first input and an output, (c) first switching means for coupling the first output of the first operational amplifier to the first input of the second operational amplifier throughout a first interval, and then decoupling the first output of the first operational amplifier from the first input of the second operational amplifier at the end of the first interval; (d) second switching means for coupling the first output of the third operational amplifier to the first input of the fourth operational amplifier throughout a second interval that begins after the decoupling.

Claim 35

A sample and hold circuit comprising in combination: (a) a first sample and hold circuit including i. a first operational amplifier having a first input receiving an analog input signal, and a first output, ii. a second operational amplifier having a first input and an output, (b) a second sample and hold circuit including i. a third operational amplifier having a first input coupled to the output of the second operational amplifier, and a first output, ii. a fourth operational amplifier having a first input and an output, (c) first switching means for coupling the first output of the first operational amplifier to the first input of the second operational amplifier throughout a first interval, and then decoupling the first output of the first operational amplifier from the first input of the second operational amplifier at the end of the first interval; (d) second switching means for coupling the first output of the third operational amplifier to the first input of the fourth operational amplifier throughout a second interval that begins after the decoupling.

Claim 36

The sample and hold circuit of claim 28 including means responsive to a first level of a first sample control signal for repeatedly performing the sequence of operations including (1) causing the first switching means to couple the first output of the first operational amplifier to the first input of the second operational amplifier during the first interval to cause the analog input signal to be acquired and held on the output of the second operational amplifier in response to a first level of the first sample control signal, (2) causing the first switching means to then decouple the first output of the first operatioanl amplifier from the first input of the second operatioanal amplifier in response to a second level of the first sample control signal so that a first value of the analog input signal that is acquired immediately before the decoupling is held on the output of the second operational amplifier nd the first input of the third operational amplifier, (3) causing the second switching means to couple the first output of the third operational amplifier to the first input of the fourth operational amplifier during the second interval to cause the first value to be acquired and held on the output of the fourth operational amplifier during the second interval.

Claim 37

The sample and hold circuit of claim 29 wherein the first operational amplifier includes a second input and a second output coupled by the first switching means to a second input of the second operational amplifier and the third operational amplifier has a second input and a second output coupled by the second switching means to a second input of the fourth operational amplifier.

Claim 40

The method of claim 31 including repeating steps (a) through (c) for successive first and successive levels of the first sample control signal, whereby essentially no ripple voltage is produced on the output of the fourth operational amplifier.

Claim 41

A modulator/demodulator circuit comprising in combination: (a) a modulator circuit including i. means for receiving an analog input current; ii. first switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; iii. first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the input current and the first current is positive or negative; iv. means for producing a duty cycle modulated signal on the first conductor having a first level if the output voltage exceeds a threshold voltage and a second level if the output voltage is less than another threshold voltage; (b) means for coupling the first conductor to a second conductor; and (c) a demodulator including i. second switching means for producing a second current that is switched between positive and negative levels in responsie to the duty cycle modulated signal on the second conductor; ii. second integrating means for integrating the second current to produce an analog output signal that is accurately representative of the analog input current, wherein the second integrating circuit means includes a first operational amplifier having a first input responsive to the second current, a second input coupled to a demodulator ground reference voltage, a first capacitor having a first terminal coupled to the first input of the first operational amplifier and a second terminal connected to an output of the first operational amplifier, a sample and hold circuit having an analog input coupled to the output of the first operational amplifier, an analog output conductor coupled to a first terminal of an output resistor, a second terminal of the output resistor being connected to the first input of the first operational amplifier, the analog output voltage being produced on the analog output conductor of the sample and hold circuit, the sample and hold circuit including a sample control input coupled to the second conductor.

Claim 42

A modulator/demodulator circuit comprising in combination: (a) a modulator circuit including i. means for receiving an analog input current; ii. first switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; iii. first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the input current and the first current is positive or negative; iv. means for producing a duty cycle modulated signal on the first conductor having a first level if the output voltage exceeds a threshold voltage and a second level if the output voltage is less than another threshold voltage; (b) means for coupling the first conductor to a second conductor; and (c) a demodulator including i. second switching means for producing a second current that is switched between positive and negative levels in responsie to the duty cycle modulated signal on the second conductor; ii. second integrating means for integrating the second current to produce an analog output signal that is accurately representative of the analog input current, wherein the second integrating circuit means includes a first operational amplifier having a first input responsive to the second current, a second input coupled to a demodulator ground reference voltage, a first capacitor having a first terminal coupled to the first input of the first operational amplifier and a second terminal connected to an output of the first operational amplifier, a sample and hold circuit having an analog input coupled to the output of the first operational amplifier, an analog output conductor coupled to a first terminal of an output resistor, a second terminal of the output resistor being connected to the first input of the first operational amplifier, the analog output voltage being produced on the analog output conductor of the sample and hold circuit, the sample and hold circuit including a sample control input coupled to the second conductor.

Claim 43

An isolation amplifier comprising in combination: (a) a modulator circuit including i. means for producing an analog input current in response to an analog input voltage; ii. first current switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; iii. first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the analog input current and the first current is positive or negative; iv. means for producing a duty-cycle-modulated digital signal on the first conductor having a first level if the output voltage of the first integrating circuit means exceeds a threshold voltage and a second level if the output voltage of the first integrating circuit means is less than another threshold voltage, wherein the first integrating circuit means includes a first operational amplifier having a first input receiving the analog input current and connected to a first terminal of a first capacitor, a second terminal of the first capacitor being connected to an output of the first operational amplifier, wherein the threshold voltage is synchronized to a periodic noise signal, the comparator responding to the threshold voltage to synchronize a carrier frequency of the modulator to the periodic noise signal to prevent the modulator from producing a low frequency beat signal; (b) a non-galvanic isolation barrier having an input coupled to the first conductor and an output coupled to a second conductor; and (c) a demodulator including i. second switching means for producing a second current that is switched between positive and negative levels in response to the duty cycle modulated digital signal on the second conductor; ii. second integrating circuit means for integrating the second current to produce an analog output voltage that is accurately representative of the analog input voltage.

Claim 44

An isolation amplifier comprising in combination: (a) a modulator circuit including i. means for producing an analog input current in response to an analog input voltage; ii. first current switching means for producing a first current that is switched between positive and negative values in response to a signal on a first conductor; iii. first integrating circuit means for integrating an algebraic sum of the analog input current and the first current to produce an output voltage that increases or decreases in accordance with whether the algebraic sum of the analog input current and the first current is positive or negative; iv. means for producing a duty-cycle-modulated digital signal on the first conductor having a first level if the output voltage of the first integrating circuit means exceeds a threshold voltage and a second level if the output voltage of the first integrating circuit means is less than another threshold voltage, wherein the first integrating circuit means includes a first operational amplifier having a first input receiving the analog input current and connected to a first terminal of a first capacitor, a second terminal of the first capacitor being connected to an output of the first operational amplifier, wherein the threshold voltage is synchronized to a periodic noise signal, the comparator responding to the threshold voltage to synchronize a carrier frequency of the modulator to the periodic noise signal to prevent the modulator from producing a low frequency beat signal; (b) a non-galvanic isolation barrier having an input coupled to the first conductor and an output coupled to a second conductor; and (c) a demodulator including i. second switching means for producing a second current that is switched between positive and negative levels in response to the duty cycle modulated digital signal on the second conductor; ii. second integrating circuit means for integrating the second current to produce an analog output voltage that is accurately representative of the analog input voltage.

Claim 49

A demodulator circuit comprising in combination: (a) first circuit means for receiving a digital input signal that is modulated to represent an analog input signal and producing in response thereto a switch control signal inlcuding a sequence of pulses; (b) a first current source; (c) a second current source connected to a first summing node, the second current source producing a current that is substantially different than the current produced by the first current source; (d) switching means for electrically coupling the first current source to the first summing node during the pulses of the switch control signal; (e) integrating circuit means having a first input coupled to the first summing node and an output for integrating a current flowing from the first summing node to the first input; (f) a sample and hold circuit having an input coupled to the output of the integrating circuit means and an output, and a sample control input responsive to the digital input signal; (g) a feedback resistor coupled between the output of the sample and hold circuit and the first summing node, the output of the sample and hold circuit means producing an analog output signal that accurately represents the analog input signal, the sample and hold circuit operating to substantially reduce ripple voltage on the analog output signal.

Claim 50

A demodulator circuit comprising in combination: (a) first circuit means for receiving a digital input signal that is modulated to represent an analog input signal and producing in response thereto a switch control signal inlcuding a sequence of pulses; (b) a first current source; (c) a second current source connected to a first summing node, the second current source producing a current that is substantially different than the current produced by the first current source; (d) switching means for electrically coupling the first current source to the first summing node during the pulses of the switch control signal; (e) integrating circuit means having a first input coupled to the first summing node and an output for integrating a current flowing from the first summing node to the first input; (f) a sample and hold circuit having an input coupled to the output of the integrating circuit means and an output, and a sample control input responsive to the digital input signal; (g) a feedback resistor coupled between the output of the sample and hold circuit and the first summing node, the output of the sample and hold circuit means producing an analog output signal that accurately represents the analog input signal, the sample and hold circuit operating to substantially reduce ripple voltage on the analog output signal.

Claim 51

The demodulator circuit of claim 37 wherein the current produced by the first current sources is twice the current produced by the second current source, whereby the integrating circuit means integrates the algebraic sum of a feedback current in the feedback resistor and a first current that is switched between values of plus or minus the value of the current produced by the second current source.