Periodic averaging circuit

Claim 2

A periodic averaging circuit for a time-division potentiometer comprising a pulse counter for counting clock pulses of a constant period, a logic circuit for comparing the counted value of the pulse counter with a given digital code signal to detect the time of agreement of them, an operational amplifier, and a changeover switch connected to an input circuit of the operational amplifier and driven by the output of the logic circuit to change over an input analog signal, in which a voltage or current signal of a voltage-dividing ratio corresponding to the digital code signal applied to the logic circuit is derived at the output terminal of the operational amplifier.

Claim 3

A periodic averaging circuit comprising: an integrator having a charge storage means; a sampling hold circuit having a second charge storage means and a switch means and being supplied with the output of the integrator; a sampling pulse generating means for operating the switch means of said sampling hold circuit; and a negative feedback circuit for feeding the output of said sampling hold circuit back to the input side of said integrator, said integrator integrating an input signal supplied thereto and the output signal of the sampling hold circuit which is supplied to said integrator through said negative feedback circuit, said sampling hold circuit sampling and holding the output of said integrator in accordance with the sampling pulse applied to said switch means of said sampling hold circuit to thereby obtain at the output of said sampling hold circuit an output signal containing no undesired pulsations which correspond to said input signal.

Claim 4

A periodic averaging circuit comprising: an integrator having a charge storage means; a sampling hold circuit having a second charge storage means and a switch means and being supplied with the output of the integrator; a sampling pulse generating means for operating the switch means of said sampling hold circuit; and a negative feedback circuit for feeding the output of said sampling hold circuit back to the input side of said integrator, said integrator integrating an input signal supplied thereto and the output signal of the sampling hold circuit which is supplied to said integrator through said negative feedback circuit, said sampling hold circuit sampling and holding the output of said integrator in accordance with the sampling pulse applied to said switch means of said sampling hold circuit to thereby obtain at the output of said sampling hold circuit an output signal containing no undesired pulsations which correspond to said input signal.

Claim 5

A periodic averaging circuit for a time-division potentiometer comprising: a switching circuit for tuning on and off an input signal; an integrator having a charge storage means and connected to said switching circuit; a sampling hold circuit having a second charge storage means and a switch means and supplied with the output of said integrator; a sampling pulse generating means for operating said switch means of said sampling hold circuit in synchronism with the on-off period of said switching circuit; and a negative feedback circuit for negatively feeding the output signal from said sampling hold circuit back to the input side of said integrator, said integrator integrating an input signal supplied thereto and the output signal of said sampling hold circuit supplied thereto through said negative feedback circuit, said sampling hold circuit sampling and holding the output of said integrator in accordance with the sampling pulses applied to said switch means of said sampling hold to thereby obtain at the output of said sampling hold circuit an electrical signal having a voltage-dividing ratio corresponding to the on-off period of said switching circuit.

Claim 6

A periodic averaging circuit for a time-division potentiometer comprising: a switching circuit for tuning on and off an input signal; an integrator having a charge storage means and connected to said switching circuit; a sampling hold circuit having a second charge storage means and a switch means and supplied with the output of said integrator; a sampling pulse generating means for operating said switch means of said sampling hold circuit in synchronism with the on-off period of said switching circuit; and a negative feedback circuit for negatively feeding the output signal from said sampling hold circuit back to the input side of said integrator, said integrator integrating an input signal supplied thereto and the output signal of said sampling hold circuit supplied thereto through said negative feedback circuit, said sampling hold circuit sampling and holding the output of said integrator in accordance with the sampling pulses applied to said switch means of said sampling hold to thereby obtain at the output of said sampling hold circuit an electrical signal having a voltage-dividing ratio corresponding to the on-off period of said switching circuit.

Claim 7

A periodic averaging circuit for a time-division potentiometer as claimed in claim 3 wherein a switch is inserted in said feedback circuit and is adapted to be turned off in synchronism with the sampling pulse for driving said switch means of said sampling hold circuit.

Claim 8

A periodic averaging circuit for a time-division potentiometer comprising: a pulse counter for counting clock pulses of a constant period; a logic circuit for comparing the counted value of the pulse counter with a given digital code signal to detect when they agree; a switching circuit for turning on and off an input signal in accordance with the output of said logic circuit; an integrator having a charge storage means and an operational amplifier; a sampling hold circuit having a second charge storage means and another switch means and connected to the output side of said integrator; and a negative feedback circuit for negatively feeding back the output signal of said sampling hold circuit to the input side of said integrator, said integrator integrating the input signal applied thereto through said switching circuit and the output signal of said sampling hold circuit applied thereto through said negative feedback circuit, said sampling hold circuit sampling and holding the output of said integrator in accordance with a sampling pulse applied to said switch means of said sampling hold circuit to thereby obtain at the output of said sampling hold circuit an electrical signal having a voltage-dividing ratio corresponding to the digital code signal applied to said logic circuit.

Claim 9

A periodic averaging circuit for a time-division potentiometer comprising: a pulse counter for counting clock pulses of a constant period; a logic circuit for comparing the counted value of the pulse counter with a given digital code signal to detect when they agree; a switching circuit for turning on and off an input signal in accordance with the output of said logic circuit; an integrator having a charge storage means and an operational amplifier; a sampling hold circuit having a second charge storage means and another switch means and connected to the output side of said integrator; and a negative feedback circuit for negatively feeding back the output signal of said sampling hold circuit to the input side of said integrator, said integrator integrating the input signal applied thereto through said switching circuit and the output signal of said sampling hold circuit applied thereto through said negative feedback circuit, said sampling hold circuit sampling and holding the output of said integrator in accordance with a sampling pulse applied to said switch means of said sampling hold circuit to thereby obtain at the output of said sampling hold circuit an electrical signal having a voltage-dividing ratio corresponding to the digital code signal applied to said logic circuit.