Method of enhanced introduction of impurity species into a semiconductor structure from a deposited source and application thereof

Claim 1

A method of converting at least a portion of a Group III-V semiconductor structure into a region having different bandgap properties than originally deposited layers in the region so converted from comprising the steps of epitaxially depositing a first Group III-V semiconductor region interposed between second Group III-V semiconductor regions of higher bandgap than said first region, depositing a impurity diffusion source layer on at least a portion of the surface of said Group III-V semiconductor structure in the presence of a diffusion enabling agent, depositing a thin passivating layer on said diffusion source layer of a thickness to prevent the outdiffusion of Group III-V elemental constituents therethrough, and initially annealing said structure at a high temperature for a short period of time to induce a heavy concentration of said impurity species in the immediate surface region of said structure, and thereafter annealing said structure at a low temperature for a long period of time to bring about a sharp diffusion profile extending into said structure converting said first and second semiconductor regions into a region of disordered alloy comprising materials of both of said first and second semiconductor regions, said alloy region exhibiting a higher energy gap than said first semiconductor region.

Claim 2

A method of converting at least a portion of a Group III-V semiconductor structure into a region having different bandgap properties than originally deposited layers in the region so converted from comprising the steps of epitaxially depositing a first Group III-V semiconductor region interposed between second Group III-V semiconductor regions of higher bandgap than said first region, depositing a impurity diffusion source layer on at least a portion of the surface of said Group III-V semiconductor structure in the presence of a diffusion enabling agent, depositing a thin passivating layer on said diffusion source layer of a thickness to prevent the outdiffusion of Group III-V elemental constituents therethrough, and initially annealing said structure at a high temperature for a short period of time to induce a heavy concentration of said impurity species in the immediate surface region of said structure, and thereafter annealing said structure at a low temperature for a long period of time to bring about a sharp diffusion profile extending into said structure converting said first and second semiconductor regions into a region of disordered alloy comprising materials of both of said first and second semiconductor regions, said alloy region exhibiting a higher energy gap than said first semiconductor region.

Claim 3

A method of introducing impurity species into a Group III-V semiconductor structure comprising the steps of depositing a diffusion source layer comprising the impurity species of Si or Ge on the surface of said structure in the presence of an source of As, P or Sb heavily doping said layer in the range of 5 to 20 by atomic percent, depositing a thin cap layer on said diffusion source layer to prevent the outdiffusion of elemental constituents comprising said structure, initially annealing said structure at a high temperature in the range of 900° C. to 1100° C. to overcome any interfacial barrier to diffusion of said impurity species into said structure and to form in a surface region of said structure a surface diffusion profile containing a high concentration of said impurity species, thereafter annealing said structure at a lower temperature in the range of 700° C. to 900° C. to induce an extension of the diffusion profile deeper into said structure, the combination of said annealing steps creating a diffusion profile having a sharp delineation in said structure and permitting a deeper penetration of the diffusion profile compared to the penetration depth obtainable employing exclusively the second of said annealing steps at a given temperature due to the presence of said surface diffusion profile.

Claim 4

A method of introducing impurity species into a Group III-V semiconductor structure comprising the steps of depositing a diffusion source layer comprising the impurity species of Si or Ge on the surface of said structure in the presence of an source of As, P or Sb heavily doping said layer in the range of 5 to 20 by atomic percent, depositing a thin cap layer on said diffusion source layer to prevent the outdiffusion of elemental constituents comprising said structure, initially annealing said structure at a high temperature in the range of 900° C. to 1100° C. to overcome any interfacial barrier to diffusion of said impurity species into said structure and to form in a surface region of said structure a surface diffusion profile containing a high concentration of said impurity species, thereafter annealing said structure at a lower temperature in the range of 700° C. to 900° C. to induce an extension of the diffusion profile deeper into said structure, the combination of said annealing steps creating a diffusion profile having a sharp delineation in said structure and permitting a deeper penetration of the diffusion profile compared to the penetration depth obtainable employing exclusively the second of said annealing steps at a given temperature due to the presence of said surface diffusion profile.